lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 22 Nov 2019 13:48:39 +0100
From:   Andreas Färber <afaerber@...e.de>
To:     Marc Zyngier <maz@...terjones.org>,
        James Tai <james.tai@...ltek.com>
Cc:     Mark Rutland <mark.rutland@....com>,
        Rob Herring <robh+dt@...nel.org>,
        "'linux-kernel@...r.kernel.org'" <linux-kernel@...r.kernel.org>,
        linux-arm-kernel@...ts.infradead.org,
        linux-realtek-soc@...ts.infradead.org
Subject: Re: [PATCH] arm64: dts: realtek: Add Realtek rtd1619 and mjolnir

Am 22.11.19 um 10:43 schrieb Marc Zyngier:
> On 2019-11-17 15:39, James Tai wrote:
>> Hi Andreas,
>>
>>> > Sorry for my misunderstanding. The RAM region don't require two cells
>>> > for memory nodes, so I'll fix it in v3 patch.
>>>
>>> Should I then also change RTD1395 to use only one cell, or does it
>>> support
>>> more RAM than RTD1619?
>>
>> Yes, you can. The memory capacity of RTD1395 and RTD1619 are the same.
>>
>>> By my calculation 0x98000000 is less than 2.4 GiB! So, does RAM continue
>>> between r-bus and GIC, similar to how it does on RTD1195? Then we
>>> need to
>>> exclude those RAM ranges from the SoC node (adjusting 0x68000000).
>>
>> We need to reserve memory address for r-bus and GIC and exclude those
>> RAM range from the SoC node.
> 
> Memory for the GIC? For what purpose?

MMIO, for GICD and GICR. It's about fixing the ranges of the /soc node:

My proposed
ranges = <0x98000000 0x98000000 0x68000000>;
needs to be split, with a gap between r-bus and GIC for continued RAM.

https://github.com/afaerber/linux/commit/1884ec6a533c9d5c2b6ca40ee138ff7e8312b6c8

This goes back to Rob's review of RTD1295 [1], where we then for lack of
memory space documentation assumed that everything beyond 2 GiB would be
potential register space. Here we're dealing with up to 4 GiB though.


James, are you planning to send a fix-up patch here? If not, you'll need
to tell me what values to use, e.g., is there a NOR flash region on
RTD1619, and does RAM continue also in between and after GIC, or is
there some timer register behind it, like on RTD1195?

ranges = <0x00000000 0x00000000 0x00030000>, // ??? boot ROM size
         <0x98000000 0x98000000 0x00200000>, // r-bus
         // anything here? e.g., NOR flash?
         <0xff100000 0xff100000 0x00010000>, // GICD
         <0xff140000 0xff140000 0x000c0000>; // GICR
         // anything here? e.g., timer enable?

ranges = <0x00000000 0x00000000 0x00030000>,
         <0x98000000 0x98000000 0x00200000>,
         <0xff100000 0xff100000 0x00100000>; // whole GIC?

Regards,
Andreas

[1] https://patchwork.kernel.org/patch/9588611/

-- 
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Felix Imendörffer
HRB 36809 (AG Nürnberg)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ