linux-kernel - Re: [PATCH v8 1/2] pinctrl: Add pinmux & GPIO controller driver for a new SoC

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Date:   Fri, 22 Nov 2019 10:19:38 +0800
From:   "Tanwar, Rahul" <rahul.tanwar@...ux.intel.com>
To:     Linus Walleij <linus.walleij@...aro.org>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>, Rob Herring <robh@...nel.org>,
        Andriy Shevchenko <andriy.shevchenko@...el.com>,
        qi-ming.wu@...el.com, yixin.zhu@...ux.intel.com,
        cheol.yong.kim@...el.com
Subject: Re: [PATCH v8 1/2] pinctrl: Add pinmux & GPIO controller driver for a
 new SoC


Hi Linus,

On 21/11/2019 9:47 PM, Linus Walleij wrote:
> Hi Rahul,
>
> On Fri, Nov 15, 2019 at 10:25 AM Rahul Tanwar
> <rahul.tanwar@...ux.intel.com> wrote:
>
>> Intel Lightning Mountain SoC has a pinmux controller & GPIO controller IP which
>> controls pin multiplexing & configuration including GPIO functions selection &
>> GPIO attributes configuration.
>>
>> This IP is not based on & does not have anything in common with Chassis
>> specification. The pinctrl drivers under pinctrl/intel/* are all based upon
>> Chassis spec compliant pinctrl IPs. So this driver doesn't fit & can not use
>> pinctrl framework under pinctrl/intel/* and it requires a separate new driver.
>>
>> Add a new GPIO & pin control framework based driver for this IP.
>>
>> Signed-off-by: Rahul Tanwar <rahul.tanwar@...ux.intel.com>
> Thanks a lot for quick iterations and hard work on getting this
> driver in such a nice shape in such a short time!
>
> Patch applied for kernel v5.5.
>
> If there are any remaining issues I am sure we can fix them up
> in-tree.

Thanks a lot for your valuable time/feedback, encouraging words
& for accepting the patch.

Regards,
Rahul