lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Sun, 16 Oct 2022 16:37:41 +0800
From:   Yaliang Wang <Yaliang.Wang@...driver.com>
To:     Tudor.Ambarus@...rochip.com, pratyush@...nel.org, michael@...le.cc,
        miquel.raynal@...tlin.com, richard@....at, vigneshr@...com
Cc:     linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] mtd: spi-nor: gigadevice: gd25q256: replace
 gd25q256_default_init with gd25q256_post_bfpt



On 10/3/22 13:35, Tudor.Ambarus@...rochip.com wrote:
> [Please note: This e-mail is from an EXTERNAL e-mail address]
> 
> On 9/13/22 11:40, yaliang.wang@...driver.com wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> From: Yaliang Wang <Yaliang.Wang@...driver.com>
>>
>> When utilizing PARSE_SFDP to initialize the flash parameter, the
>> deprecated initializing method spi_nor_init_params_deprecated() and the
>> function spi_nor_manufacturer_init_params() within it will never be
>> executed, which results in the default_init hook function will also never
>> be executed. As we do have quad enable function defined in BFPT, the
>> post_bfpt hook will be the right place to tweak the function.
>>
>> Cc: stable@...r.kernel.org
>> Fixes: 047275f7de18 ("mtd: spi-nor: gigadevice: gd25q256: Init flash based on SFDP")
>> Reported-by: kernel test robot <lkp@...el.com>
>> Signed-off-by: Yaliang Wang <Yaliang.Wang@...driver.com>
>> ---
>>   drivers/mtd/spi-nor/gigadevice.c | 11 ++++++++---
>>   1 file changed, 8 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c
>> index 119b38e6fc2a..bdc4d73424af 100644
>> --- a/drivers/mtd/spi-nor/gigadevice.c
>> +++ b/drivers/mtd/spi-nor/gigadevice.c
>> @@ -8,19 +8,24 @@
>>
>>   #include "core.h"
>>
>> -static void gd25q256_default_init(struct spi_nor *nor)
>> +static int
>> +gd25q256_post_bfpt(struct spi_nor *nor,
>> +                  const struct sfdp_parameter_header *bfpt_header,
>> +                  const struct sfdp_bfpt *bfpt)
>>   {
>>          /*
>>           * Some manufacturer like GigaDevice may use different
>>           * bit to set QE on different memories, so the MFR can't
>>           * indicate the quad_enable method for this case, we need
>> -        * to set it in the default_init fixup hook.
>> +        * to set it in the post_bfpt fixup hook.
>>           */
>>          nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
>> +
>> +       return 0;
>>   }
> 
> Maybe we can get rid of this fixup hook entirely. If it was a default_init(), then it
> was set before the SFDP was parsed, so the quad_enable method was overwritten anyway.
> Would you please check why this method was introduced?

I googled the gd25q256 datasheet, and found 'C' generation 
datasheet(GD25Q256C[1]) implements the JESD216 standards, it doesn't 
have the QER(Quad Enable Requirements) field in BFPT, but it does have 
the QE bit in SR1 bit6, this may be the reason why the method was 
introduced.

[1]https://datasheetspdf.com/pdf-file/1295936/GigaDevice/GD25Q256C/1
> 
> What Quad Enable method do you get from SFDP? I expect that spi_nor_sr1_bit6_quad_enable,
> and the fixup hook to be in vain.
As above mentioned, 'C' generation doesn't have the QER field in BFPT, 
so no corresponding quad_enable method can be found in SFDP.

Regrading to 'D' generation [2], it implements the JESD216B standards, 
the corresponding quad_enable method is spi_nor_sr2_bit1_quad_enable, 
parsing the BFPT can get the right method.

As for 'E' generation[3], it also implements the JESD216B standards and 
has the same status registers as defined in 'D' generation, but its 
datasheet doesn't contain SFDP and BFPT definations, so there may be 
some uncertain.

So, in summary, I think 'C' generation devices still need the post_bfpt 
to add the correct quad_enable method, this can do some benefits to the 
outdated devices. For sure, the post_bfpt method should distinguish the 
JESD216 standards the first and then apply the correct quad_enable 
method, I can cook another patch to do this.

[2]https://www.gigadevice.com/datasheet/gd25q256d/
[3]https://www.gigadevice.com/datasheet/gd25q256e/
> 
>>
>>   static const struct spi_nor_fixups gd25q256_fixups = {
>> -       .default_init = gd25q256_default_init,
>> +       .post_bfpt = gd25q256_post_bfpt,
>>   };
>>
>>   static const struct flash_info gigadevice_nor_parts[] = {
>> --
>> 2.34.1
>>
> 
> 
> --
> Cheers,
> ta

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ