linux-kernel - [PATCH 2/2] riscv: dts: sophgo: set pinctrl for uart0

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Date:   Mon, 13 Nov 2023 08:57:02 +0800
From:   Jisheng Zhang <jszhang@...nel.org>
To:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Chao Wei <chao.wei@...hgo.com>,
        Chen Wang <unicorn_wang@...look.com>
Cc:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-riscv@...ts.infradead.org
Subject: [PATCH 2/2] riscv: dts: sophgo: set pinctrl for uart0

Although the mux function is uart by default, add it for
completeness.

Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
---
 arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
index 3af9e34b3bc7..cc10688908bc 100644
--- a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
+++ b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
@@ -33,6 +33,17 @@ &osc {
 	clock-frequency = <25000000>;
 };
 
+&pinctrl0 {
+	uart0_pins: uart0-pins {
+		pinctrl-single,pins = <
+			0x24 MUX_M0 /* UART0_TX */
+			0x28 MUX_M0 /* UART0_RX */
+		>;
+	};
+};
+
 &uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins>;
 	status = "okay";
 };
-- 
2.42.0