lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date: Sat, 27 Apr 2024 10:50:12 +0800
From: Huacai Chen <chenhuacai@...nel.org>
To: Xi Ruoyao <xry111@...111.site>
Cc: WANG Xuerui <kernel@...0n.name>, loongarch@...ts.linux.dev, 
	linux-kernel@...r.kernel.org, Tiezhu Yang <yangtiezhu@...ngson.cn>
Subject: Re: [PATCH] LoongArch: Provide __lshrti3, __ashrti3, and __ashrti3

Hi, Ruoyao,

I don't think #ifdef CONFIG_ARCH_SUPPORTS_INT128 is needed here.
S390/ARM64/RISCV all built it unconditionally. And I think this patch
can be squashed to the one enable ARCH_SUPPORTS_INT128, as S390 does.

Huacai

On Fri, Apr 26, 2024 at 8:14 PM Xi Ruoyao <xry111@...111.site> wrote:
>
> After selecting ARCH_SUPPORTS_INT128, when optimizing for size the
> compiler generates calls to __lshrti3, __ashrti3, and __ashrti3 for
> shifting __int128 values, causing a link failure:
>
>     loongarch64-unknown-linux-gnu-ld: kernel/sched/fair.o: in
>     function `mul_u64_u32_shr':
>     <PATH>/include/linux/math64.h:161:(.text+0x5e4): undefined
>     reference to `__lshrti3'
>
> Provide the implementation of these functions if ARCH_SUPPORTS_INT128.
>
> Reported-by: Huacai Chen <chenhuacai@...nel.org>
> Closes: https://lore.kernel.org/loongarch/CAAhV-H5EZ=7OF7CSiYyZ8_+wWuenpo=K2WT8-6mAT4CvzUC_4g@mail.gmail.com/
> Signed-off-by: Xi Ruoyao <xry111@...111.site>
> ---
>  arch/loongarch/include/asm/asm-prototypes.h |  6 +++
>  arch/loongarch/lib/Makefile                 |  2 +
>  arch/loongarch/lib/tishift.S                | 56 +++++++++++++++++++++
>  3 files changed, 64 insertions(+)
>  create mode 100644 arch/loongarch/lib/tishift.S
>
> diff --git a/arch/loongarch/include/asm/asm-prototypes.h b/arch/loongarch/include/asm/asm-prototypes.h
> index cf8e1a4e7c19..51f224bcfc65 100644
> --- a/arch/loongarch/include/asm/asm-prototypes.h
> +++ b/arch/loongarch/include/asm/asm-prototypes.h
> @@ -6,3 +6,9 @@
>  #include <asm/page.h>
>  #include <asm/ftrace.h>
>  #include <asm-generic/asm-prototypes.h>
> +
> +#ifdef CONFIG_ARCH_SUPPORTS_INT128
> +__int128_t __ashlti3(__int128_t a, int b);
> +__int128_t __ashrti3(__int128_t a, int b);
> +__int128_t __lshrti3(__int128_t a, int b);
> +#endif
> diff --git a/arch/loongarch/lib/Makefile b/arch/loongarch/lib/Makefile
> index a77bf160bfc4..f61af161f16e 100644
> --- a/arch/loongarch/lib/Makefile
> +++ b/arch/loongarch/lib/Makefile
> @@ -9,3 +9,5 @@ lib-y   += delay.o memset.o memcpy.o memmove.o \
>  obj-$(CONFIG_CPU_HAS_LSX) += xor_simd.o xor_simd_glue.o
>
>  obj-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o
> +
> +obj-$(CONFIG_ARCH_SUPPORTS_INT128) += tishift.o
> diff --git a/arch/loongarch/lib/tishift.S b/arch/loongarch/lib/tishift.S
> new file mode 100644
> index 000000000000..eb43f29f4d0b
> --- /dev/null
> +++ b/arch/loongarch/lib/tishift.S
> @@ -0,0 +1,56 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +
> +#include <asm/asmmacro.h>
> +#include <linux/linkage.h>
> +#include <linux/export.h>
> +
> +SYM_FUNC_START(__lshrti3)
> +       slli.d  t2, a1, 1
> +       nor     t3, zero, a2
> +       srl.d   t1, a0, a2
> +       sll.d   t2, t2, t3
> +       andi    t0, a2, 64
> +       srl.d   a1, a1, a2
> +       or      t1, t2, t1
> +       maskeqz a0, a1, t0
> +       masknez a1, a1, t0
> +       masknez t0, t1, t0
> +       or      a0, t0, a0
> +       jr      ra
> +SYM_FUNC_END(__lshrti3)
> +EXPORT_SYMBOL(__lshrti3)
> +
> +SYM_FUNC_START(__ashrti3)
> +       nor     t3, zero, a2
> +       slli.d  t2, a1, 1
> +       srl.d   t1, a0, a2
> +       sll.d   t2, t2, t3
> +       andi    t0, a2, 64
> +       or      t1, t2, t1
> +       sra.d   a2, a1, a2
> +       srai.d  a1, a1, 63
> +       maskeqz a0, a2, t0
> +       maskeqz a1, a1, t0
> +       masknez a2, a2, t0
> +       masknez t0, t1, t0
> +       or      a1, a1, a2
> +       or      a0, t0, a0
> +       jr      ra
> +SYM_FUNC_END(__ashrti3)
> +EXPORT_SYMBOL(__ashrti3)
> +
> +SYM_FUNC_START(__ashlti3)
> +       srli.d  t2, a0, 1
> +       nor     t3, zero, a2
> +       sll.d   t1, a1, a2
> +       srl.d   t2, t2, t3
> +       andi    t0, a2, 64
> +       sll.d   a0, a0, a2
> +       or      t1, t2, t1
> +       maskeqz a1, a0, t0
> +       masknez a0, a0, t0
> +       masknez t0, t1, t0
> +       or      a1, t0, a1
> +       jr      ra
> +SYM_FUNC_END(__ashlti3)
> +EXPORT_SYMBOL(__ashlti3)
> --
> 2.44.0
>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ