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Date: Wed, 29 Nov 2006 11:16:38 +0100 From: "Eric Lemoine" <eric.lemoine@...il.com> To: "David Miller" <davem@...emloft.net> Cc: benh@...nel.crashing.org, netdev@...r.kernel.org Subject: Re: [patch sungem] improved locking On 11/29/06, David Miller <davem@...emloft.net> wrote: > From: Benjamin Herrenschmidt <benh@...nel.crashing.org> > Date: Wed, 29 Nov 2006 09:57:24 +1100 > > > > > > This looks mostly fine. > > > > > > I was thinking about the lockless stuff, and I wonder if there > > > is a clever way you can get it back down to one PIO on the > > > GREG_STAT register. > > > > > > I think you'd need to have the ->poll() clear gp->status, then > > > do a smp_wb(), right before it re-enables interrupts. > > > > > > Then in the interrupt handler, you need to find a way to safely > > > OR-in any unset bits in gp->status in a race-free manner. > > > > Having it atomic might work at a slightly smaller cost than a lock, > > though atomics don't have strong ordering requirements so you'd still > > have to be a bit careful. > > At least in theory the atomic + any necessary memory barriers > would be cheaper than the extra PIO read we need otherwise. Just a remark: the lockless impl doesn't add a PIO read, it adds a PIO write (to the IACK reg). FYI, I'm currently checking whether I can get rid of this extra PIO write, based on David's suggestion... -- Eric - To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
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