netdev - Re: NAPI and shared interrupt control

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Date:	Thu, 07 Dec 2006 01:59:54 -0800 (PST)
From:	David Miller <davem@...emloft.net>
To:	ebs@...home.net
Cc:	benh@...nel.crashing.org, netdev@...r.kernel.org
Subject: Re: NAPI and shared interrupt control

From: Eugene Surovegin <ebs@...home.net>
Date: Thu, 7 Dec 2006 01:45:02 -0800

> I fail to see how this is not even more ugly and more complex than the 
> solution we have right now. Instead of trivial "orthogonal" polling 
> code you are suggesting adding additional complexity - handle 
> dynamic selection of that "master" EMAC and also handling situation 
> when this master device goes down and you have to switch to 
> another one without disturbing polling for other active devices. Why 
> all this? This hw is ugly enough as it is.

Don't do dynamic selection, that indeed would be dumb.

Instead, just pick one of them to act as the polling master.
Each EMAC has a backpointer to the master EMAC, and trigger
the poll via that indirection.

With this shared interrupt scheme and lack of hw interrupt
mitigation, how did the designers of this chip expect people
to do interrupt mitigation?  I suppose they expected you to
do it by standing on your head :-)

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