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Date:	Thu, 15 May 2008 16:03:55 -0500
From:	Nate Case <ncase@...-inc.com>
To:	"Maciej W. Rozycki" <macro@...ux-mips.org>
Cc:	netdev <netdev@...r.kernel.org>
Subject: Re: [PATCH] PHYLIB: Add 1000Base-X support for Broadcom bcm5482

On Thu, 2008-05-15 at 00:15 +0100, Maciej W. Rozycki wrote:
>  OK.  One note on this occasion: please keep the registers sorted by the
> index.  I missed it with the original review, but the additional registers
> at 0x15, 0x17 and 0x18 (and the values within) should be placed between
> MII_BCM54XX_ESR at 0x11 and MII_BCM54XX_ISR at 0x1a.

Fixed this in patch v3 (coming up shortly).

>  I was a bit worried how it plays with actually trying to force different,
> perhaps incompatible, link parameters.

I didn't try forcing speeds from userspace, but the worst I can envision
happening is that after forcing 10mbit/s or half-duplex mode (for
example) it would still report 1000mbit/s FD.  The forcing itself would
probably not report an error, though you could argue that it should.  My
understanding is that the hardware will take the writes but ignore those
registers in 1000Base-X mode.

-- 
Nate Case <ncase@...-inc.com>

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