netdev - Need ioctl for multiple register phy access

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Date:	Fri, 16 May 2008 10:34:35 -0600
From:	<glenn_engel@...lent.com>
To:	<netdev@...r.kernel.org>
Subject: Need ioctl for multiple register phy access

Some of the newer versions of the National Phy chip have additional 'pages' of registers for things like link diagnostics or ieee1588 control.  Some of these require multiple writes to the phy (e.g write page number to reg 19, then write to one or more registers on that page).  Additionally, some phy registers have depth and may need multiple reads or writes as they have more than 16 bits of data.  Since these operations need to be done without interruption of other phy commands, the usual write one register or read one register ioctl technique does not work.  Since the phy access is an intimate part of the driver it would seem the logical place would be to enhance the existing driver to deal with these new phy capabilities.

Option 1. - Use the existing SIOCGMIIREG/SIOCSMIIREG ioctl and use a magic phy_id (e.g 0xffff) in the mii_ioctl_data structure to indicate a multi register access request.   The data would then be encoded as a variable length sequence:

    <number of bytes to follow>
    <16 bit encoded R/W, phy id, page#, register#>
    <16 bit write value or read result>
    <repeat in groups of two 16 bit words>

Option 2 - Add a new ioctl to allow multiple register access.  The format would be something like a list of 'commands' such as read register R1 on page P1,  write register R2 on page P2 etc.  I see an ioctl SIOCDEVPRIVATE but I also see a comment about it being removed in the future.

Suggestions welcome on how to address this.

Thanks,

--
Glenn

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