netdev - Re: Patch for tbench regression.

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Date:	Mon, 29 Sep 2008 15:02:13 +0800
From:	Herbert Xu <herbert@...dor.apana.org.au>
To:	Evgeniy Polyakov <johnpol@....mipt.ru>
Cc:	netdev@...r.kernel.org,
	Christoph Lameter <cl@...ux-foundation.org>,
	Mel Gorman <mel@....ul.ie>, David Miller <davem@...emloft.net>,
	Lennert Buytenhek <buytenh@...vell.com>
Subject: Re: Patch for tbench regression.

On Mon, Sep 29, 2008 at 10:45:18AM +0400, Evgeniy Polyakov wrote:
>
> $ cat /proc/interrupts 
> CPU0       
> 0:         71    XT-PIC-XT        timer
> 1:          8    XT-PIC-XT        i8042
> 2:          0    XT-PIC-XT        cascade
> 5:      17606    XT-PIC-XT        eth0
> 12:          5    XT-PIC-XT        i8042
> 14:       6925    XT-PIC-XT        ide0
> 15:        141    XT-PIC-XT        ide1
> NMI:          0   Non-maskable interrupts
> LOC:    1190668   Local timer interrupts
> RES:          0   Rescheduling interrupts
> CAL:          0   function call interrupts
> TLB:          0   TLB shootdowns
> TRM:          0   Thermal event interrupts
> SPU:          0   Spurious interrupts
> ERR:          0
> MIS:          0

OK you're on FV as well.  I'll try it on my laptaop next.

> Shouldn't tests over loopback be like lots of memcpy in the userspace
> process? Usually its performance is close enough to the kernel's range,
> despite very different sizes of TLB entries.

Where it may differ is when you have context switches.

Cheers,
-- 
Visit Openswan at http://www.openswan.org/
Email: Herbert Xu ~{PmV>HI~} <herbert@...dor.apana.org.au>
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