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Date:	Thu, 15 Jan 2009 11:50:57 +0200
From:	"Eilon Greenstein" <eilong@...adcom.com>
To:	"David Miller" <davem@...emloft.net>
cc:	"netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: Re: [PATCH 02/34]bnx2x: Barriers for the compiler

On Wed, 2009-01-14 at 13:13 -0800, David Miller wrote:
> From: "Eilon Greenstein" <eilong@...adcom.com>
> Date: Wed, 14 Jan 2009 18:42:44 +0200
> 
> > To make sure no swapping are made by the compiler, changed HAS_WORK to inline
> > functions and added all the necessary barriers
> > 
> > Signed-off-by: Eilon Greenstein <eilong@...adcom.com>
> 
> Don't you need cpu memory barriers too?  What if the cpu reorders what
> you're trying to order using just a compiler barrier?
> 
The CPU memory barriers are in place (actually, they needed some fixing,
but that was in another patch) - this one is just for the compiler and
after reviewing it again now, I still believe that it is sufficient. I
need the current executing CPU to take the right decision based on what
it currently knows - synchronization between CPUs and HW is using CPU
memory barrier.

IMHO this patch is correct.

Eilon


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