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Date:	Tue, 03 Mar 2009 13:32:40 +0100
From:	Jesper Dangaard Brouer <jdb@...x.dk>
To:	Gary Thomas <gary@...assoc.com>
Cc:	Jesper Dangaard Brouer <hawk@...u.dk>,
	Lennert Buytenhek <buytenh@...tstofly.org>,
	netdev <netdev@...r.kernel.org>
Subject: Re: Marvell 88E609x switch?

On Tue, 2009-03-03 at 05:03 -0700, Gary Thomas wrote:
> Jesper Dangaard Brouer wrote:
> > On Mon, 2009-03-02 at 15:32 -0700, Gary Thomas wrote:
> >> Any ideas how I might troubleshoot why packets that come
> >> into lan1.1 (port 0) aren't being pushed to the CPU port?
> > 
> > The switch supports port monitoring, with seperate ingress and egress
> > mapping, thus you could place another PC on another port and direct
> > traffic towards that, and by tcpdump inspecting ingress and egress on
> > the different physical ports... Thats how I debugged it once...
> 
> I'm a bit fuzzy on this - could you explain in a bit more detail?

You basically set the monitor destination port via REG_GLOBAL reg 0x1A
"Monitor Control".

/* Register: Monitor Control (0x1A)
   -------------------------
    bit 15:12= Ingress Monitor Dest
    bit 11:8 = Egress  Monitor Dest
    bit  7:4 = ARP Dest
    bit  3:0 = Reserved
*/

Then you configure the port register 0x08 "port control2", that this
port is to be monitored: bit5=monitor_egress and bit4=monitor_ingress.

/* Register: Port Control 2 (0x8)
   ------------------------
    bit 15    = IgnoreFSC: Force good FSC in frame
    bit 14    = VTU_prio_override   : VTU    setting overrides prio
    bit 13    = ATU_SA_prio_overrite: ATU SA setting overrides prio
    bit 12    = ATU_DA_prio_overrite: ATU DA setting overrides prio
    bit 11:10 = 802.1Q mode
     [00] = <Disabled>: use VLANtable only
     [01] = <Fallback>: fallback to VLANTable
     [10] = <Check>   : drop on miss (eq. not in VTU)
     [11] = <Secure>  : drop on miss and membership violation
    bit 9     = Discard Tagged
    bit 8     = Discard Untagged
    bit 7     = MapDA: Map using DA hits
    bit 6     = Default Forward (normal switch operation)
    bit 5     = Monitor egress
    bit 4     = Monitor ingress
    bit 3:0   = CPU port
*/


Reading through the "Monitor Control" register description, there is a
interesting description about the "ARPdest" setting... Could you try to
set it to the CPU port and see if that helps?

-- 
Med venlig hilsen / Best regards
  Jesper Brouer
  ComX Networks A/S
  Linux Network developer
  Cand. Scient Datalog / MSc.
  Author of http://adsl-optimizer.dk
  LinkedIn: http://www.linkedin.com/in/brouer
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