lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Tue, 14 Jul 2009 23:01:54 +0200
From:	Krzysztof Halasa <khc@...waw.pl>
To:	David Miller <davem@...emloft.net>
Cc:	netdev@...r.kernel.org, Jeff Kirsher <jeffrey.t.kirsher@...el.com>,
	Jesse Brandeburg <jesse.brandeburg@...el.com>,
	Bruce Allan <bruce.w.allan@...el.com>,
	PJ Waskiewicz <peter.p.waskiewicz.jr@...el.com>,
	John Ronciak <john.ronciak@...el.com>,
	e1000-devel@...ts.sourceforge.net
Subject: Re: Debounce code vs. dma_sync_single_range_for_cpu() and e100 driver.

(Added Cc:)

David Miller <davem@...emloft.net> writes:

> And it's especially buggy if it isn't doing DMA API sync calls before
> looking at descriptor fields, as your patch seems to cure.

Well, it does that but doesn't "sync for device" _after_ looking at the
RX descriptor (when the device is to own the desc again). On IXP4xx the
ownership transfer (cache flush/invalidate) happens on "sync for device"
only (which IMHO seems a bit fragile, though).

So what do we do?

Maybe you apply the workaround for 2.6.31 and I (or someone) will
convert e100 to coherent allocs for packet descriptors, post-31?

This isn't a terrible problem (x86 isn't affected), perhaps we should
leave it as is for 2.6.31 making sure it doesn't get out of sight with
the workaround in place?

Guess it's too risky for me to mess with the coherent allocs conversion
for 31, I don't know e100 code at all (and I have to leave for few weeks
on Thursday).



E100: work around the driver using streaming DMA mapping for RX descriptors.

E100 places it's RX packet descriptors inside skb->data and uses them
with bidirectional streaming DMA mapping. Unfortunately it fails to
transfer skb->data ownership to the device after it reads the
descriptor's status, breaking on non-coherent (e.g., ARM) platforms.

This have to be converted to use coherent memory for the descriptors.

Signed-off-by: Krzysztof Halasa <khc@...waw.pl>

--- a/drivers/net/e100.c
+++ b/drivers/net/e100.c
@@ -1762,6 +1762,9 @@ static int e100_rx_indicate(struct nic *nic, struct rx *rx,
 
 			if (ioread8(&nic->csr->scb.status) & rus_no_res)
 				nic->ru_running = RU_SUSPENDED;
+		pci_dma_sync_single_for_device(nic->pdev, rx->dma_addr,
+					       sizeof(struct rfd),
+					       PCI_DMA_BIDIRECTIONAL);
 		return -ENODATA;
 	}
 
--
To unsubscribe from this list: send the line "unsubscribe netdev" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Powered by blists - more mailing lists