netdev - RE: [PATCH 1/2] ibm_newemac: Add Support for MAL Interrupt Coalescing

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Date:	Tue, 22 Sep 2009 11:09:51 +1000
From:	Benjamin Herrenschmidt <benh@...nel.crashing.org>
To:	Prodyut Hazarika <phazarika@...c.com>
Cc:	prodyut hazarika <prodyuth@...il.com>, netdev@...r.kernel.org,
	Feng Kan <fkan@...c.com>, Loc Ho <lho@...c.com>,
	Victor Gallardo <vgallardo@...c.com>,
	bhutchings@...arflare.com, linuxppc-dev@...ts.ozlabs.org,
	davem@...emloft.net, jwboyer@...ux.vnet.ibm.com,
	lada.podivin@...il.com
Subject: RE: [PATCH 1/2] ibm_newemac: Add Support for MAL Interrupt
 Coalescing

On Mon, 2009-09-21 at 17:53 -0700, Prodyut Hazarika wrote:
> 
> In the newer revs of 460EX/GT and 405EX, we have Interrupt coalescing
> both on Tx and Rx per channel (physical not virtual), which can be
> enabled/disabled per channel via UIC. The Tx/Rx Coalesce mappings are
> defined in the dts file. But in the older revs, there is only a global
> EOP_Int_Enable in the MAL configuration register. There can be a
> possible way even for older SoCs if we use the MAL descriptor I bit
> and
> not the global EOP_Int_Enable. But to turn on/off the channel, we will
> have to go and set/clear the I bit in whole of MAL descriptor ring for
> that channel. That might be really inefficient.
> 
> What would you suggest?

I wouldn't bother with the old SoCs, we should keep the current
workaround we have today for them. For the new ones, I'll have a look
and see how we can get the driver upgraded to avoid the workaround.

Don't bother with this for now. I'll dig at some stage.

Cheers,
Ben.


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