netdev - Re: [PATCH] r8169: use correct barrier between cacheable and non-cacheable memory

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Date:	Thu, 04 Mar 2010 00:40:48 -0800 (PST)
From:	David Miller <davem@...emloft.net>
To:	dave@...dillows.org
Cc:	netdev@...r.kernel.org, romieu@...zoreil.com, paulus@...ba.org,
	catalin.marinas@....com
Subject: Re: [PATCH] r8169: use correct barrier between cacheable and
 non-cacheable memory

From: David Dillow <dave@...dillows.org>
Date: Wed, 03 Mar 2010 21:33:10 -0500

> r8169 needs certain writes to be visible to other CPUs or the NIC before
> touching the hardware, but was using smp_wmb() which is only required to
> order cacheable memory access. Switch to wmb() which is required to
> order both cacheable and non-cacheable memory.
> 
> Noticed by Catalin Marinas and Paul Mackerras.
> 
> Signed-off-by: David Dillow <dave@...dillows.org>

Applied.
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