netdev - Re: [patch 1/1] phy/marvell: fix 88e1121 support

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Date:	Tue, 19 Oct 2010 13:49:20 +0200
From:	Arnaud Patard (Rtp) <arnaud.patard@...-net.org>
To:	cyril@...com
Cc:	"netdev\@vger.kernel.org" <netdev@...r.kernel.org>,
	"David S. Miller" <davem@...emloft.net>
Subject: Re: [patch 1/1] phy/marvell: fix 88e1121 support

Cyril Chemparathy <cyril@...com> writes:

> Hi Arnaud,

Hi,

>
> On 10/18/2010 06:29 PM, Arnaud Patard wrote:
>> Commit c477d0447db08068a497e7beb892b2b2a7bff64b added support for RGMII
>> rx/tx delays except that it ends up clearing rx/tx delays bit for modes
>> differents that RGMII*ID. Due to this, ethernet is not working anymore
>> on my guruplug server +. This patch is fixing that.
>> 
>> Signed-off-by: Arnaud Patard <arnaud.patard@...-net.org>
>> Index: linux-2.6/drivers/net/phy/marvell.c
>> ===================================================================
>> --- linux-2.6.orig/drivers/net/phy/marvell.c	2010-10-18 22:46:09.000000000 +0200
>> +++ linux-2.6/drivers/net/phy/marvell.c	2010-10-19 00:20:22.000000000 +0200
>> @@ -196,20 +196,27 @@
>>  			MII_88E1121_PHY_MSCR_PAGE);
>>  	if (err < 0)
>>  		return err;
>> -	mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) &
>> -		MII_88E1121_PHY_MSCR_DELAY_MASK;
>>  
>> -	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
>> -		mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
>> -			 MII_88E1121_PHY_MSCR_TX_DELAY);
>> -	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
>> -		mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
>> -	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
>> -		mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
>> +	if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
>> +	    (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
>> +	    (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) ||
>> +	    (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
>>  
>> -	err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
>> -	if (err < 0)
>> -		return err;
>> +		mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) &
>> +			MII_88E1121_PHY_MSCR_DELAY_MASK;
>> +
>> +		if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
>> +			mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
>> +				 MII_88E1121_PHY_MSCR_TX_DELAY);
>> +		else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
>> +			mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
>> +		else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
>> +			mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
>> +
>> +		err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
>> +		if (err < 0)
>> +			return err;
>> +	}
>>  
>>  	phy_write(phydev, MII_88E1121_PHY_PAGE, oldpage);
>
> That looks more correct.  Just out of curiosity, what is the interface
> mode on your platform?

The interface is in GMII mode iirc. The device is the ethernet embedded
in the Kirkwood SoC with a 88e1121 phy connected. It's handled by the
mv643xx_eth driver and the marvell phy driver.

Arnaud
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