netdev - Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.

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Date:	Mon, 08 Aug 2011 15:16:32 +0200
From:	Wolfgang Grandegger <wg@...ndegger.com>
To:	Marc Kleine-Budde <mkl@...gutronix.de>
CC:	Robin Holt <holt@....com>, socketcan-core@...ts.berlios.de,
	netdev@...r.kernel.org, U Bhaskar-B22300 <B22300@...escale.com>
Subject: Re: [RFC 5/5] [powerpc] Implement a p1010rdb clock source.

On 08/08/2011 03:00 PM, Marc Kleine-Budde wrote:
> On 08/08/2011 02:48 PM, Robin Holt wrote:
>>>> OK.  Dug a bit more.  The p1010 built-in clocksource seems to be the
>>>> periphereal clock frequency which is system bus frequency divided
>>>> by 2.  The clock source can not be changed, but the clock divider can
>>>> by freezing the interface and setting the CTRL register.  This appears
> 
>>> Which bit(s) in the CTRL register is/are this?
> 
>> PRESDIV bits 24-31.  Documented on the P1010 reference manual section 21.3.3.2.
> 
> We have and use these bits on arm, too. These bits are calculated and
> set by the driver[1]. These bits are touched in freescale's 2.6.35
> version of the flexcan driver, too.

OK, now it starts making sense. And these bits are set according to
relevant DTS properties, I assume. And the input frequency is derived
from the "clock_freq" property entered by the U-Boot bootloader.

> From my point of view it makes no sense to specify this divider in the
> OF-tree. We just need the frequency of the clock entering the flexcan
> core. Which is, as you say, the system bus freq/2.
> 
> [1]
> http://lxr.linux.no/linux+v3.0.1/drivers/net/can/flexcan.c#L597

Yep, I just wrote a similar comment in my previous mail.

So, of we want to allow the user to define the clock source and divider,
we should provide an interface for both, ARM and PPC.

Wolfgang.
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