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Date:	Wed, 7 Dec 2011 15:52:10 -0600
From:	Kumar Gala <galak@...nel.crashing.org>
To:	David Miller <davem@...emloft.net>
Cc:	afleming@...escale.com, netdev@...r.kernel.org,
	linuxppc-dev@...ts.ozlabs.org
Subject: Re: [PATCH] powerpc: Add TBI PHY node to first MDIO bus


On Dec 7, 2011, at 2:02 PM, David Miller wrote:

> From: Andy Fleming <afleming@...escale.com>
> Date: Wed, 7 Dec 2011 13:50:57 -0600
> 
>> Systems which use the fsl_pq_mdio driver need to specify an
>> address for TBI PHY transactions such that the address does
>> not conflict with any PHYs on the bus (all transactions to
>> that address are directed to the onboard TBI PHY). The driver
>> used to scan for a free address if no address was specified,
>> however this ran into issues when the PHY Lib was fixed so
>> that all MDIO transactions were protected by a mutex. As it
>> is, the code was meant to serve as a transitional tool until
>> the device trees were all updated to specify the TBI address.
>> 
>> The best fix for the mutex issue was to remove the scanning code,
>> but it turns out some of the newer SoCs have started to omit
>> the tbi-phy node when SGMII is not being used. As such, these
>> devices will now fail unless we add a tbi-phy node to the first
>> mdio controller.
>> 
>> Signed-off-by: Andy Fleming <afleming@...escale.com>
>> ---
>> 
>> This requires fsl_pq_mdio: Clean up tbi address configuration from
>> the net tree in order to achieve its full effect.
>> 
>> This needs to go into 3.2.
> 
> I'm fine if the powerpc tree takes this one:
> 
> Acked-by: David S. Miller <davem@...emloft.net>

Will pull in via PPC tree.

- k
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