netdev - [net-next PATCH] bnx2x: correct LPI pass-through configuration

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Date:	Sun, 17 Jun 2012 15:04:50 +0300
From:	"Yuval Mintz" <yuvalmin@...adcom.com>
To:	davem@...emloft.net, netdev@...r.kernel.org
cc:	dan.carpenter@...cle.com, eilong@...adcom.com,
	"Yuval Mintz" <yuvalmin@...adcom.com>,
	"Yaniv Rosner" <yaniv.rosner@...adcom.com>
Subject: [net-next PATCH] bnx2x: correct LPI pass-through configuration

Commit c8c60d88c59cbb48737732ba948663a3efe882aa contained
an incorrect logic which enabled a buffer overflow when accessing 
an array during LPI pass-through configuration.
This patch fixes this issue by removing that logic altogether.

Signed-off-by: Yuval Mintz <yuvalmin@...adcom.com>
Signed-off-by: Yaniv Rosner <yaniv.rosner@...adcom.com>
Signed-off-by: Eilon Greenstein <eilong@...adcom.com>
---
Thanks goes to Dan Carpenter for finding this bug.

Dave, please apply this patch to 'net-next'. 

Thanks,
Yuval Mintz
---
 drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c |   18 ++++++------------
 1 files changed, 6 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
index c7c814d..91aa565 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
@@ -4057,18 +4057,12 @@ static void bnx2x_warpcore_set_10G_XFI(struct bnx2x_phy *phy,
 			 MDIO_WC_REG_DIGITAL4_MISC3, val | 0x8080);
 
 	/* Enable LPI pass through */
-	if ((params->eee_mode & EEE_MODE_ADV_LPI) &&
-	    (phy->flags & FLAGS_EEE_10GBT) &&
-	    (!(params->eee_mode & EEE_MODE_ENABLE_LPI) ||
-	      bnx2x_eee_calc_timer(params)) &&
-	    (params->req_duplex[bnx2x_phy_selection(params)] == DUPLEX_FULL)) {
-		DP(NETIF_MSG_LINK, "Configure WC for LPI pass through\n");
-		bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD,
-				 MDIO_WC_REG_EEE_COMBO_CONTROL0,
-				 0x7c);
-		bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD,
-					 MDIO_WC_REG_DIGITAL4_MISC5, 0xc000);
-	}
+	DP(NETIF_MSG_LINK, "Configure WC for LPI pass through\n");
+	bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD,
+			 MDIO_WC_REG_EEE_COMBO_CONTROL0,
+			 0x7c);
+	bnx2x_cl45_read_or_write(bp, phy, MDIO_WC_DEVAD,
+				 MDIO_WC_REG_DIGITAL4_MISC5, 0xc000);
 
 	/* 10G XFI Full Duplex */
 	bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD,
-- 
1.7.9.rc2


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