lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:	Sat, 27 Jul 2013 20:14:21 -0700 (PDT)
From:	David Miller <davem@...emloft.net>
To:	shangw@...ux.vnet.ibm.com
Cc:	netdev@...r.kernel.org, divy@...lsio.com
Subject: Re: [PATCH] net/CXGB3: Avoid access MMIO on offlined PCI dev

From: Gavin Shan <shangw@...ux.vnet.ibm.com>
Date: Thu, 25 Jul 2013 15:32:04 +0800

> While we have EEH errors happened on specific PCI device, the PE
> (Partitionable Endpoint) which includes the PCI device is expected
> to be reset. During the reset, the PCI device should have been
> marked as "offline" and it's not safe to access MMIO of that PCI
> device with "offline" state. That might cause the failure to do
> EEH recovery and then the PCI device is removed from the system for
> ever before manual recovery.
> 
> The patch avoids access to MMIO while the PCI device has been marked
> "offline" so that to avoid additional EEH errors during reset and make
> sure that the EEH recovery can be done successfully.
> 
> Signed-off-by: Gavin Shan <shangw@...ux.vnet.ibm.com>

Making this check on every single register read or write is not
reasonable.

If this is how register access in every driver has to be done in order
to support EEH errors properly, it is simply not acceptable.
--
To unsubscribe from this list: send the line "unsubscribe netdev" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ