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Date:	Wed, 05 Feb 2014 11:49:57 +0100
From:	Christian Riesch <christian.riesch@...cron.at>
To:	Mugunthan V N <mugunthanvnm@...com>,
	"Sørensen, Stefan" 
	<Stefan.Sorensen@...ctralink.com>,
	"ben@...adent.org.uk" <ben@...adent.org.uk>
CC:	"davem@...emloft.net" <davem@...emloft.net>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: Re: [PATCH] net:cpsw: Pass unhandled ioctl's on to generic phy ioctl

On 2014-02-05 09:18, Mugunthan V N wrote:
> On Wednesday 05 February 2014 12:58 PM, Sørensen, Stefan wrote:
>> The CPSW only supports timestamping which is only one part of the PTP
>> functionality. Some PHYs (like the dp83630 that we use with the CPSW)
>> also has external event generation and detection.
> CPSW also has External event detection upto 4 events and newer SoCs upto
> 8 events, currently no boards came with this pins pinned out, so it is
> not supported as of now. If we have a board design with this we can
> support external event generation.

But for external event generation it would be useful to adjust the clock 
frequency of the PHC. IIRC this is broken on some silicon like the 
AM335x, right?

Christian
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