netdev - Re: cache coherency problem, why not happening ?

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Date:	Tue, 1 Apr 2014 11:30:35 +0200
From:	Hannes Frederic Sowa <hannes@...essinduktion.org>
To:	ratheesh kannoth <ratheesh.ksz@...il.com>
Cc:	netdev <netdev@...r.kernel.org>,
	Netfilter mailing list <netfilter@...r.kernel.org>
Subject: Re: cache coherency problem, why not happening ?

On Tue, Apr 01, 2014 at 09:49:53AM +0530, ratheesh kannoth wrote:
> Suppose in smp machine,  if  bottom half is executed by  cpu #1  and
> the  userspace process is pinned to cpu #2.  How can the  spin lock
> acuquired info ( lock value ) will be reflected   to cpu #2 ( if cpu
> #2 has already acquired and released the lock value and the lock value
> is  stored in a cpu #2 data cache. so if cpu #1 acquire it , cpu#2
> will read the cache value which says it is free). I could see that
> spin_lock_t is not a volatile value also.

volatile is a construct from C-language standard and does not help that much
with syncing to CPUs.

(Specific for Intel processors, now)

If you read the beginning of Chapter 8
<http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-system-programming-manual-325384.pdf>

then lookup ticket spinlocks and then revisit the spin_lock implementation it
should get clear.

Have fun,

  Hannes

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