netdev - RE: [PATCH v1 4/6] net: fec: Increase buffer descriptor entry number

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Date:	Fri, 30 May 2014 15:08:40 +0000
From:	"fugang.duan@...escale.com" <fugang.duan@...escale.com>
To:	Eric Dumazet <eric.dumazet@...il.com>,
	"ezequiel.garcia@...e-electrons.com" 
	<ezequiel.garcia@...e-electrons.com>
CC:	David Laight <David.Laight@...LAB.COM>,
	"Frank.Li@...escale.com" <Frank.Li@...escale.com>,
	"davem@...emloft.net" <davem@...emloft.net>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"shawn.guo@...aro.org" <shawn.guo@...aro.org>,
	"bhutchings@...arflare.com" <bhutchings@...arflare.com>,
	"stephen@...workplumber.org" <stephen@...workplumber.org>
Subject: RE: [PATCH v1 4/6] net: fec: Increase buffer descriptor entry number

From: Eric Dumazet <eric.dumazet@...il.com> Data: Friday, May 30, 2014 10:54 PM
>To: ezequiel.garcia@...e-electrons.com
>Cc: Duan Fugang-B38611; David Laight; Li Frank-B20596; davem@...emloft.net;
>netdev@...r.kernel.org; shawn.guo@...aro.org; bhutchings@...arflare.com;
>stephen@...workplumber.org
>Subject: Re: [PATCH v1 4/6] net: fec: Increase buffer descriptor entry
>number
>
>On Fri, 2014-05-30 at 11:01 -0300, ezequiel.garcia@...e-electrons.com
>wrote:
>> Hello Eric,
>>
>> On 30 May 06:13 AM, Eric Dumazet wrote:
>> > On Fri, 2014-05-30 at 09:42 +0000, fugang.duan@...escale.com wrote:
>> > > From: David Laight <David.Laight@...LAB.COM> Data: Friday, May 30,
>> > > 2014 5:11 PM
>> > > >
>> > > >Does the driver support BQL (or similar) in order to limit the
>> > > >amount of queued tx traffic?
>> > > >Otherwise you've significantly increased the latency for
>> > > >connections other than one doing bulk tx.
>> > > >
>> > > >	David
>> > > >
>> > > The driver still don't support BQL.
>> > > I will add the feature to support FEC. Thanks for your advise.
>> >
>> > Note that a full size TSO packet (44 or 45 MSS) requires about 88 or
>> > 90 descriptors.
>> >
>>
>> What's the rationale behing those numbers?
>>
>
>64KB TSO packet, with MSS=1460 -> 44 segments  (44*1460 = 64240) with
>MSS=1448 (TCP timestamps) -> 45 segments  (45*1448 = 65160)
>
>This software TSO emulation uses at least 2 descriptors per MSS
>
>one descriptor to hold the headers (ethernet + ip + tcp) one descriptor
>(or two) to hold the payload for this MSS
>
Thanks for Eric's detail explain.

If frag page data is not match the alignment for ethernet DMA controller, there need three descriptor for one MSS:
One descriptor for headers, one for the first non-align bytes copied from frag page, one for the rest of frag page.

So one frame may cost descriptor number is: 3 x 45 

And I will add interrupt coalescing support for tx and rx, which also cost some more descriptors.

So the descriptors slots set to 512 is not big, just is reasonable. Do you think ?


Thanks,
Andy