netdev - Re: [PATCH net-next 2/3] dp83640: Program pulsewidth2 values of perout triggers 0 and 1

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Date:	Wed, 25 Jun 2014 21:50:49 +0400
From:	Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To:	Stefan Sørensen 
	<stefan.sorensen@...ctralink.com>, davem@...emloft.net,
	richardcochran@...il.com
CC:	netdev@...r.kernel.org
Subject: Re: [PATCH net-next 2/3] dp83640: Program pulsewidth2 values of perout
 triggers 0 and 1

Hello.

On 06/25/2014 04:37 PM, Stefan Sørensen wrote:

> Periodic output triggers 0 and 1 of the dp83640 has a programmable
> duty-cycle which is controlled by the Pulsewidth2 field of the trigger
> data register.  This field is not documented in the datasheet, but it
> is described in the "PHYTER Software Development Guide" section
> 3.1.4.1. Failing to set the field can result in unstable/no trigger
> output.

> Add programming of the Pulsewidth2 field, setting it to the same value
> as the Pulsewidth field for a 50% duty cycle.

> Signed-off-by: Stefan Sørensen <stefan.sorensen@...ctralink.com>
> ---
>   drivers/net/phy/dp83640.c | 5 +++++
>   1 file changed, 5 insertions(+)

> diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c
> index 73fada9..0343b6c 100644
> --- a/drivers/net/phy/dp83640.c
> +++ b/drivers/net/phy/dp83640.c
> @@ -353,6 +353,11 @@ static int periodic_output(struct dp83640_clock *clock,
>   	ext_write(0, phydev, PAGE4, PTP_TDR, sec >> 16);       /* sec[31:16] */
>   	ext_write(0, phydev, PAGE4, PTP_TDR, pwidth & 0xffff); /* ns[15:0] */
>   	ext_write(0, phydev, PAGE4, PTP_TDR, pwidth >> 16);    /* ns[31:16] */
> +	/* Triggers 0 and 1 has programmable pulsewidth2 */
> +	if(trigger < 2) {

    Please run your patches thru scripts/checkpatch.pl -- space is needed 
after *if*.

WBR, Sergei

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