netdev - Re: [PATCH net] net/mlx4: Cache line CQE/EQE stride fixes

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Date:	Tue, 16 Dec 2014 15:24:25 -0500 (EST)
From:	David Miller <davem@...emloft.net>
To:	amirv@...lanox.com
Cc:	netdev@...r.kernel.org, yevgenyp@...lanox.com,
	ogerlitz@...lanox.com, clsoto@...ux.vnet.ibm.com,
	idos@...lanox.com, weiyang@...ux.vnet.ibm.com
Subject: Re: [PATCH net] net/mlx4: Cache line CQE/EQE stride fixes

From: Amir Vadai <amirv@...lanox.com>
Date: Tue, 16 Dec 2014 14:29:11 +0200

> On 12/16/2014 1:28 PM, Amir Vadai wrote:
>> From: Ido Shamay <idos@...lanox.com>
>> 
>> This commit contains 2 fixes for the 128B CQE/EQE stride feaure.
>> Wei found that mlx4_QUERY_HCA function marked the wrong capability
>> in flags (64B CQE/EQE), when CQE/EQE stride feature was enabled.
>> Also added small fix in initial CQE ownership bit assignment, when CQE
>> is size is not default 32B.
>> 
>> Fixes: 77507aa24 (net/mlx4: Enable CQE/EQE stride support)
>> Signed-off-by: Wei Yang <weiyang@...ux.vnet.ibm.com>
>> Signed-off-by: Ido Shamay <idos@...lanox.com>
>> Signed-off-by: Amir Vadai <amirv@...lanox.com>
>> ---
>> Dave Hi,
>> 
>> Please pull this patch also to stable (at least 3.17)
>> 
>> Thanks,
>> Amir
> 
> Small correction: Should pull into -stable >= 3.18

Applied and queued up for -stable, thanks.
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