lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Tue, 1 Dec 2015 01:52:35 +0000
From:	Duan Andy <fugang.duan@...escale.com>
To:	Lothar Waßmann <LW@...O-electronics.de>,
	Andrew Lunn <andrew@...n.ch>,
	"David S. Miller" <davem@...emloft.net>,
	Fabio Estevam <Fabio.Estevam@...escale.com>,
	Greg Ungerer <gerg@...inux.org>,
	Kevin Hao <haokexin@...il.com>,
	Lucas Stach <l.stach@...gutronix.de>,
	Philippe Reynes <tremyfr@...il.com>,
	Richard Cochran <richardcochran@...il.com>,
	Russell King <rmk+kernel@....linux.org.uk>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	"Stefan Agner" <stefan@...er.ch>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	Jeff Kirsher <jeffrey.t.kirsher@...el.com>,
	"Uwe Kleine-K?nig" <u.kleine-koenig@...gutronix.de>
Subject: RE: [PATCH 0/3] net: fec: Reset ethernet PHY whenever the enet_out
 clock

From: Lothar Waßmann <LW@...O-electronics.de> Sent: Monday, November 30, 2015 7:33 PM
> To: Andrew Lunn; David S. Miller; Estevam Fabio-R49496; Greg Ungerer;
> Kevin Hao; Lothar Waßmann; Lucas Stach; Duan Fugang-B38611; Philippe
> Reynes; Richard Cochran; Russell King; Sascha Hauer; Stefan Agner; linux-
> kernel@...r.kernel.org; netdev@...r.kernel.org; Jeff Kirsher; Uwe Kleine-
> König
> Subject: [PATCH 0/3] net: fec: Reset ethernet PHY whenever the enet_out
> clock
> 
> This patchset fixes a regression introduced by commit 8fff755e9f8d ("net:
> fec: Ensure clocks are enabled while using mdio bus") for ethernet PHYs
> that are using ENET_OUT as reference clock (on i.MX6 or i.MX28)
> 
Do you mean commit 8fff755e9f8d cause your problem ?  This commit just manage ipg clock in runtime because mdio bus can access external phy switch no matter netdev status.

I don't think the commit cause phy link up/down issue.  Phy link up/down is due to phy is not ready after power/clock on, it need to do reset.


> The first patch is a cleanup patch that removes redundant NULL checks.
> The second patch converts the driver to use the 'gpiod' framework.
> The third patch makes sure, fec_reset_phy() is called whenever the
>     enet_out clock has been (re-)enabled to get the PHY into a
>     consistent state.

Powered by blists - more mailing lists