netdev - Re: [PATCH RESEND net-next 3/3] arm64: hip05-d02: Document devicetree bindings for Hisilicon D02 Board

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Date:	Mon, 7 Dec 2015 09:29:59 +0800
From:	"Yankejian (Hackim Yim)" <yankejian@...wei.com>
To:	Arnd Bergmann <arnd@...db.de>
CC:	<davem@...emloft.net>, <robh+dt@...nel.org>, <pawel.moll@....com>,
	<mark.rutland@....com>, <ijc+devicetree@...lion.org.uk>,
	<galak@...eaurora.org>, <xuwei5@...ilicon.com>,
	<catalin.marinas@....com>, <will.deacon@....com>,
	<wangkefeng.wang@...wei.com>, <dingtianhong@...wei.com>,
	<liguozhu@...wei.com>, <Yisen.Zhuang@...wei.com>,
	<sboyd@...eaurora.org>, <haojian.zhuang@...aro.org>,
	<wangzhou1@...ilicon.com>, <bintian.wang@...wei.com>,
	<long.wanglong@...wei.com>, <leo.yan@...aro.org>,
	<haifeng.wei@...wei.com>, <devicetree@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>, <netdev@...r.kernel.org>,
	<linuxarm@...wei.com>
Subject: Re: [PATCH RESEND net-next 3/3] arm64: hip05-d02: Document devicetree
 bindings for Hisilicon D02 Board



On 2015/12/6 6:13, Arnd Bergmann wrote:
> On Saturday 05 December 2015 15:56:58 yankejian wrote:
>> +Required properties:
>> +- compatible : "hisilicon,peri-c-subctrl", "syscon";
>> +- reg : Register address and size
>> +
>> +The HiP05 PERISUB system controller is shared by peripheral controllers in
>> +HiP05 Soc to implement some basic configurations. the peripheral
>> + controllers include mdio, ddr, iic, uart, timer and so on.
>> +
>> +Example:
>> +       /* for HiP05 PCIe-SAS system */
>> +       pcie_sas: system_controller@...0000000 {
>> +               compatible = "hisilicon,pcie-sas-subctrl", "syscon";
>> +               reg = <0xb0000000 0x10000>;
>> +       };
>>
> The compatible string in the example does not match the required properties.
>
> 	Arnd
>
> .
Hi, Arnd
Thanks for your suggestions. i will fixes it later.



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