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Date:	Thu, 7 Jan 2016 22:19:19 +0000
From:	"Nelson, Shannon" <shannon.nelson@...el.com>
To:	"Liang, Kan" <kan.liang@...el.com>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"davem@...emloft.net" <davem@...emloft.net>,
	"bwh@...nel.org" <bwh@...nel.org>
CC:	"Brandeburg, Jesse" <jesse.brandeburg@...el.com>,
	"andi@...stfloor.org" <andi@...stfloor.org>,
	"f.fainelli@...il.com" <f.fainelli@...il.com>,
	"alexander.duyck@...il.com" <alexander.duyck@...il.com>,
	"Kirsher, Jeffrey T" <jeffrey.t.kirsher@...el.com>,
	"Wyborny, Carolyn" <carolyn.wyborny@...el.com>,
	"Skidmore, Donald C" <donald.c.skidmore@...el.com>,
	"Williams, Mitch A" <mitch.a.williams@...el.com>,
	"ogerlitz@...lanox.com" <ogerlitz@...lanox.com>,
	"edumazet@...gle.com" <edumazet@...gle.com>,
	"jiri@...lanox.com" <jiri@...lanox.com>,
	"sfeldma@...il.com" <sfeldma@...il.com>,
	"gospo@...ulusnetworks.com" <gospo@...ulusnetworks.com>,
	"sasha.levin@...cle.com" <sasha.levin@...cle.com>,
	"dsahern@...il.com" <dsahern@...il.com>,
	"tj@...nel.org" <tj@...nel.org>,
	"cascardo@...hat.com" <cascardo@...hat.com>,
	"corbet@....net" <corbet@....net>,
	"ben@...adent.org.uk" <ben@...adent.org.uk>
Subject: RE: [PATCH V2 4/5] i40e/ethtool: support coalesce getting by queue


> +
> +		q_vector = vsi->rx_rings[queue]->q_vector;
> +		vector = vsi->base_vector + q_vector->v_idx;
> +		ec->rx_coalesce_usecs = ITR_REG_TO_USEC(rd32(hw, I40E_PFINT_ITRN(0, vector - 1)));

Use I40E_RX_ITR rather than the hardcoded 0

> +
> +		q_vector = vsi->tx_rings[queue]->q_vector;
> +		vector = vsi->base_vector + q_vector->v_idx;
> +		ec->tx_coalesce_usecs = ITR_REG_TO_USEC(rd32(hw, I40E_PFINT_ITRN(1, vector - 1)));

Use I40E_TX_ITR rather than the hardcoded 1

Other than that, yes, this looks like the right translation to get to the itr register you want.

sln

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