netdev - Re: [PATCH v2 net-next] bpf: arm64: remove callee-save registers use for tmp registers

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Date:	Tue, 17 May 2016 12:13:34 +0100
From:	Catalin Marinas <catalin.marinas@....com>
To:	Yang Shi <yang.shi@...aro.org>
Cc:	ast@...nel.org, davem@...emloft.net,
	linaro-kernel@...ts.linaro.org, daniel@...earbox.net,
	will.deacon@....com, linux-kernel@...r.kernel.org,
	netdev@...r.kernel.org, zlim.lnx@...il.com,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 net-next] bpf: arm64: remove callee-save registers use
 for tmp registers

On Mon, May 16, 2016 at 04:36:26PM -0700, Yang Shi wrote:
> In the current implementation of ARM64 eBPF JIT, R23 and R24 are used for
> tmp registers, which are callee-saved registers. This leads to variable size
> of JIT prologue and epilogue. The latest blinding constant change prefers to
> constant size of prologue and epilogue. AAPCS reserves R9 ~ R15 for temp
> registers which not need to be saved/restored during function call. So, replace
> R23 and R24 to R10 and R11, and remove tmp_used flag to save 2 instructions for
> some jited BPF program.
> 
> CC: Daniel Borkmann <daniel@...earbox.net>
> Acked-by: Zi Shen Lim <zlim.lnx@...il.com>
> Signed-off-by: Yang Shi <yang.shi@...aro.org>

Acked-by: Catalin Marinas <catalin.marinas@....com>