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Date:	Tue, 12 Jul 2016 15:49:13 +0300
From:	Elad Kanfi <eladkan@...lanox.com>
To:	<davem@...emloft.net>
CC:	<eladkan@...lanox.com>, <linux-kernel@...r.kernel.org>,
	<abrodkin@...opsys.com>, <netdev@...r.kernel.org>,
	Noam Camus <noamca@...lanox.com>
Subject: [PATCH 1/1] Fix PCS reset

From: Noam Camus <noamca@...lanox.com>

During commit b54b8c2d6e3c
 ("net: ezchip: adapt driver to little endian architecture")
 adapting to little endian architecture,
 zeroing of controller was left out.

Signed-off-by: Elad Kanfi <eladkan@...lanox.com>
---
 drivers/net/ethernet/ezchip/nps_enet.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/net/ethernet/ezchip/nps_enet.c b/drivers/net/ethernet/ezchip/nps_enet.c
index 06f0317..9b7a3f5 100644
--- a/drivers/net/ethernet/ezchip/nps_enet.c
+++ b/drivers/net/ethernet/ezchip/nps_enet.c
@@ -285,6 +285,7 @@ static void nps_enet_hw_reset(struct net_device *ndev)
 	ge_rst_value |= NPS_ENET_ENABLE << RST_GMAC_0_SHIFT;
 	nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst_value);
 	usleep_range(10, 20);
+	ge_rst_value = 0;
 	nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst_value);
 
 	/* Tx fifo reset sequence */
-- 
1.7.1

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