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Date:   Fri, 19 Aug 2016 14:15:22 +0800
From:   Herbert Xu <herbert@...dor.apana.org.au>
To:     Hariprasad Shenai <hariprasad@...lsio.com>
Cc:     netdev@...r.kernel.org, linux-crypto@...r.kernel.org,
        davem@...emloft.net, atul.gupta@...lsio.com, yeshaswi@...lsio.com,
        jlulla@...lsio.com, harsh@...lsio.com
Subject: Re: [PATCHv3 net-next 3/4] chcr: Support for Chelsio's Crypto
 Hardware

On Wed, Aug 17, 2016 at 12:33:05PM +0530, Hariprasad Shenai wrote:
> The Chelsio's Crypto Hardware can perform the following operations:
> SHA1, SHA224, SHA256, SHA384 and SHA512, HMAC(SHA1), HMAC(SHA224),
> HMAC(SHA256), HMAC(SHA384), HAMC(SHA512), AES-128-CBC, AES-192-CBC,
> AES-256-CBC, AES-128-XTS, AES-256-XTS
> 
> This patch implements the driver for above mentioned features. This
> driver is an Upper Layer Driver which is attached to Chelsio's LLD
> (cxgb4) and uses the queue allocated by the LLD for sending the crypto
> requests to the Hardware and receiving the responses from it.
> 
> The crypto operations can be performed by Chelsio's hardware from the
> userspace applications and/or from within the kernel space using the
> kernel's crypto API.
> 
> The above mentioned crypto features have been tested using kernel's
> tests mentioned in testmgr.h. They also have been tested from user
> space using libkcapi and Openssl.
> 
> Signed-off-by: Atul Gupta <atul.gupta@...lsio.com>
> Signed-off-by: Hariprasad Shenai <hariprasad@...lsio.com>

Acked-by: Herbert Xu <herbert@...dor.apana.org.au>
-- 
Email: Herbert Xu <herbert@...dor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

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