netdev - Re: [PATCH net-next 6/7] net/faraday: Fix phy link irq on Aspeed G5 SoCs

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Date:   Wed, 21 Sep 2016 19:03:53 +1000
From:   Benjamin Herrenschmidt <benh@...nel.crashing.org>
To:     Joel Stanley <joel@....id.au>, Andrew Lunn <andrew@...n.ch>
Cc:     davem@...emloft.net, Gavin Shan <gwshan@...ux.vnet.ibm.com>,
        Andrew Jeffery <andrew@...id.au>, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next 6/7] net/faraday: Fix phy link irq on Aspeed G5
 SoCs

On Wed, 2016-09-21 at 11:32 +0930, Joel Stanley wrote:
> I had a look at the eval board schematic and it appears that the line
> has pull down resistors on it, explaining why the IRQ fires when it's
> configured to active low. Other machines re-use the pin pin as a GPIO.
> So yes, I will change this to a dt property in v2. That will mean
> dropping 4/7 "net/faraday: Avoid PHYSTS_CHG interrupt" as well.

What line is it out of the PHY ? The PHY IRQ ? If yes then it's meant
to be telling you to go look at the PHY registers for a link status
change, but only works if the PHY has also been configured
appropriately...

Mostly we ignore those things in Linux and just poll the PHY.

Cheers,
Ben.