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Date: Sun, 30 Oct 2016 23:21:56 +0200 From: Saeed Mahameed <saeedm@...lanox.com> To: "David S. Miller" <davem@...emloft.net>, Doug Ledford <dledford@...hat.com> Cc: netdev@...r.kernel.org, linux-rdma@...r.kernel.org, Or Gerlitz <ogerlitz@...lanox.com>, Leon Romanovsky <leonro@...lanox.com>, Tal Alon <talal@...lanox.com>, Matan Barak <matanb@...lanox.com>, Artemy Kovalyov <artemyko@...lanox.com>, Leon Romanovsky <leon@...nel.org>, Saeed Mahameed <saeedm@...lanox.com> Subject: [PATCH for-next V2 03/15] net/mlx5: Ensure SRQ physical address structure endianness From: Artemy Kovalyov <artemyko@...lanox.com> SRQ physical address structure field should be in big-endian format. Signed-off-by: Artemy Kovalyov <artemyko@...lanox.com> Signed-off-by: Leon Romanovsky <leonro@...lanox.com> Signed-off-by: Leon Romanovsky <leon@...nel.org> Signed-off-by: Saeed Mahameed <saeedm@...lanox.com> --- include/linux/mlx5/srq.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/mlx5/srq.h b/include/linux/mlx5/srq.h index 33c97dc..1cde0fd 100644 --- a/include/linux/mlx5/srq.h +++ b/include/linux/mlx5/srq.h @@ -55,7 +55,7 @@ struct mlx5_srq_attr { u32 lwm; u32 user_index; u64 db_record; - u64 *pas; + __be64 *pas; }; struct mlx5_core_dev; -- 2.7.4
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