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Date: Sun, 27 Nov 2016 17:51:16 +0200 From: Tariq Toukan <tariqt@...lanox.com> To: "David S. Miller" <davem@...emloft.net> Cc: netdev@...r.kernel.org, Eran Ben Elisha <eranbe@...lanox.com>, Matan Barak <matanb@...lanox.com>, Moshe Shemesh <moshe@...lanox.com>, Tariq Toukan <tariqt@...lanox.com> Subject: [PATCH net-next 09/10] net/mlx4: Change number of max MSIXs from 64 to 1024 From: Matan Barak <matanb@...lanox.com> Increase the number of max MSIXs in order to achieve better performance on machines with high number of CPUs. Fixes: 0b7ca5a928e2 ("mlx4: Changing interrupt scheme") Signed-off-by: Matan Barak <matanb@...lanox.com> Signed-off-by: Moshe Shemesh <moshe@...lanox.com> Signed-off-by: Tariq Toukan <tariqt@...lanox.com> --- include/linux/mlx4/device.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h index 1dcd6ac3b1f3..44863e3c0981 100644 --- a/include/linux/mlx4/device.h +++ b/include/linux/mlx4/device.h @@ -47,7 +47,7 @@ #define DEFAULT_UAR_PAGE_SHIFT 12 #define MAX_MSIX_P_PORT 17 -#define MAX_MSIX 64 +#define MAX_MSIX 1024 #define MIN_MSIX_P_PORT 5 #define MLX4_IS_LEGACY_EQ_MODE(dev_cap) ((dev_cap).num_comp_vectors < \ (dev_cap).num_ports * MIN_MSIX_P_PORT) -- 1.8.3.1
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