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Date:   Fri, 21 Apr 2017 11:04:41 +0300
From:   Roger Quadros <rogerq@...com>
To:     Florian Fainelli <f.fainelli@...il.com>, <davem@...emloft.net>,
        Andrew Lunn <andrew@...n.ch>
CC:     <tony@...mide.com>, <nsekhar@...com>, <jsarha@...com>,
        <netdev@...r.kernel.org>, <linux-omap@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 net-next] mdio_bus: Issue GPIO RESET to PHYs.

Hi Florian,

On 21/04/17 04:23, Florian Fainelli wrote:
> Hi Roger,
> 
> On 04/20/2017 07:11 AM, Roger Quadros wrote:
>> Some boards [1] leave the PHYs at an invalid state
>> during system power-up or reset thus causing unreliability
>> issues with the PHY which manifests as PHY not being detected
>> or link not functional. To fix this, these PHYs need to be RESET
>> via a GPIO connected to the PHY's RESET pin.
>>
>> Some boards have a single GPIO controlling the PHY RESET pin of all
>> PHYs on the bus whereas some others have separate GPIOs controlling
>> individual PHY RESETs.
>>
>> In both cases, the RESET de-assertion cannot be done in the PHY driver
>> as the PHY will not probe till its reset is de-asserted.
>> So do the RESET de-assertion in the MDIO bus driver.
>>
>> [1] - am572x-idk, am571x-idk, a437x-idk
>>
>> Signed-off-by: Roger Quadros <rogerq@...com>
> 
> A few comments on the binding and the code, sorry for this late review.

No problem at all.
> 
>> +Example :
>> +This example shows these optional properties, plus other properties
>> +required for the TI Davinci MDIO driver.
>> +
>> +	davinci_mdio: ethernet@...c030000 {
>> +		compatible = "ti,davinci_mdio";
>> +		reg = <0x5c030000 0x1000>;
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +
>> +		reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
>> +		reset-delay-us = <2>;   /* PHY datasheet states 1uS min */
> 
> us is micro seconds, uS is micro siemens.

OK.

> 
>> +
>> +		ethphy0: ethernet-phy@1 {
>> +			reg = <1>;
>> +		};
>> +
>> +		ethphy1: ethernet-phy@3 {
>> +			reg = <3>;
>> +		};
>> +	};
> 
>>  
>> +	/* de-assert bus level PHY GPIO resets */
>> +	for (i = 0; i < bus->num_reset_gpios; i++) {
>> +		gpiod = devm_gpiod_get_index(&bus->dev, "reset", i,
>> +					     GPIOD_OUT_LOW);
>> +		if (IS_ERR(gpiod)) {
>> +			err = PTR_ERR(gpiod);
>> +			if (err != -ENOENT) {
>> +				pr_err("mii_bus %s couldn't get reset GPIO\n",
>> +				       bus->id);
> 
> Could we use dev_err(&bus->dev) here to better identify which MDIO bus
> is returning the problem?

Sure.
> 
>> +				return err;
> 
> Should we somehow "unwind" the reset lines we were able to successfully
> take out of reset and therefore put back into reset state? How about
> mdiobus_unregister()? Should we have similar code there, if not for
> correctness to be more power efficient?

Al right.

> 
>> +			}
>> +		} else {
>> +			gpiod_set_value_cansleep(gpiod, 1);
>> +			udelay(bus->reset_delay_us);
>> +			gpiod_set_value_cansleep(gpiod, 0);
> 
> Does that work even if the polarity of the reset line is active low?
> 

Yes. The polarity needs to be specified at DT as explained by Andrew already.

cheers,
-roger

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