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Date:   Sat, 22 Apr 2017 09:12:04 +0800
From:   icenowy@...c.io
To:     Florian Fainelli <f.fainelli@...il.com>
Cc:     Andrew Lunn <andrew@...n.ch>, Rob Herring <robh+dt@...nel.org>,
        netdev@...r.kernel.org, devicetree@...r.kernel.org,
        linux-sunxi@...glegroups.com, Icenowy Zheng <icenowy@...c.xyz>
Subject: Re: [PATCH 2/4] dt-bindings: add binding for RTL8211E Ethernet PHY

在 2017-04-22 08:22,Florian Fainelli 写道:
> On 04/21/2017 04:24 PM, Icenowy Zheng wrote:
>> From: Icenowy Zheng <icenowy@...c.xyz>
>> 
>> Some RTL8211E Ethernet PHY have an issue that needs a workaround
>> indicated with device tree.
>> 
>> Add the binding for a property that indicates this workaround.
>> 
>> Signed-off-by: Icenowy Zheng <icenowy@...c.xyz>
>> ---
>>  .../devicetree/bindings/net/realtek,rtl8211e.txt   | 22 
>> ++++++++++++++++++++++
>>  1 file changed, 22 insertions(+)
>>  create mode 100644 
>> Documentation/devicetree/bindings/net/realtek,rtl8211e.txt
>> 
>> diff --git 
>> a/Documentation/devicetree/bindings/net/realtek,rtl8211e.txt 
>> b/Documentation/devicetree/bindings/net/realtek,rtl8211e.txt
>> new file mode 100644
>> index 000000000000..c1913301bfe8
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/net/realtek,rtl8211e.txt
>> @@ -0,0 +1,22 @@
>> +Realtek RTL8211E Ethernet PHY
>> +
>> +One batch of RTL8211E is slight broken, that needs some special (and
>> +full of magic numbers) tweaking in order to make GbE to operate 
>> properly.
>> +The only well-known board that used the broken batch is Pine64+.
>> +Configure it through an Ethernet OF device node.
>> +
>> +Optional properties:
>> +
>> +- realtek,disable-rx-delay:
>> +  If set, RX delay will be completely disabled (according to 
>> Realtek). This
>> +  will affect the performance on non-broken boards.
>> +  default: do not disable RX delay.
> 
> Please don't introduce custom properties to do that, instead correct
> specify the "phy-mode" such that it is e.g: "rgmii-txid" which 
> indicates
> that there should be no RX internal delay, but a TX internal delay 
> added
> by the PHY.

According to Realtek and Pine64 people, set that register is equal to
hardwire RDDLY line to low.

Is it the standard definition of RGMII-TXID?

(P.S. as it's only provided as a workaround, there's no implementation
known for RGMII-RXID and RGMII-ID)

Thanks,
Icenowy

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