netdev - Re: stmmac still supporting spear600 ?

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Date:   Thu, 27 Apr 2017 11:49:22 +0200
From:   Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
To:     Giuseppe CAVALLARO <peppe.cavallaro@...com>
Cc:     Alexandre Torgue <alexandre.torgue@...com>,
        <netdev@...r.kernel.org>, Viresh Kumar <vireshk@...nel.org>,
        Shiraz Hashim <shiraz.linux.kernel@...il.com>,
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: stmmac still supporting spear600 ?

Hello Giuseppe,

On Mon, 3 Apr 2017 08:16:50 +0200, Giuseppe CAVALLARO wrote:

> I tested the SMSC on other platform (+ stmmac), not on SPEAr.
> 
> ok for reset, keep the radar on clock. Hmm, can you attach a piece of 
> log file to see the failure?

We finally identified the issue: in a MII configuration, the PS bit
need to be set for the DMA reset procedure to work, but setting the DMA
reset bit clears the PS bit. So you have to set the PS bit after
asserting the DMA reset, and before polling for the DMA reset bit to
clear.

I have sent a fix that works for us (tested GMII and MII platforms),
but not sure if the implementation is the most appropriate. Let me know
if you have better suggestions.

See: http://marc.info/?l=linux-netdev&m=149328635210461&w=2

Thanks!

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com