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Date:   Wed, 26 Jul 2017 13:35:33 -0700 (PDT)
From:   David Miller <davem@...emloft.net>
To:     thomas.petazzoni@...e-electrons.com
Cc:     netdev@...r.kernel.org, linux@....linux.org.uk,
        antoine.tenart@...e-electrons.com,
        miquel.raynal@...e-electrons.com,
        linux-arm-kernel@...ts.infradead.org, jason@...edaemon.net,
        andrew@...n.ch, sebastian.hesselbarth@...il.com,
        gregory.clement@...e-electrons.com, nadavh@...vell.com,
        hannah@...vell.com, yehuday@...vell.com, stefanc@...vell.com,
        mw@...ihalf.com
Subject: Re: [PATCH 0/8] net: mvpp2: add TX interrupts support

From: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
Date: Tue, 25 Jul 2017 17:55:01 +0200

> Hello,
> 
> So far, the mvpp2 driver was using an hrtimer to handle TX
> completion. This patch series adds support for using TX interrupts
> (for each CPU) on PPv2.2, the variant of the IP used on Marvell Armada
> 7K/8K.
> 
> This series has been tested on Marvell Armada 7K (PPv2.2) and Armada
> 375 (PPv2.1).
> 
> Dave:
> 
>  - This series depends on the previous series sent by Antoine Ténart
>    "net: mvpp2: MAC/GoP configuration and optional PHYs". Functionally
>    speaking there is no real dependency, but we touch in a few areas
>    the same piece of code, so I based my patch series on top of
>    Antoine's.
> 
>  - Please do not apply the last patch of this series "arm64: dts:
>    marvell: add TX interrupts for PPv2.2", it will be taken by the ARM
>    mvebu maintainers.

Please don't do things this way.

Patiently wait for Antione's series to make it into my tree, then
submit your's.

Also, if we're continually going to elide the DTS file patches, just
don't bother adding them to the series.  That way you don't have to
give me special instructions, and I don't have the possibility of
making a mistake and applying it accidently.

Thanks.

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