netdev - Re: [PATCH net-next v3 02/13] phy: add the mvebu cp110 comphy driver

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Date:   Wed, 30 Aug 2017 08:36:45 +0200
From:   Antoine Tenart <antoine.tenart@...e-electrons.com>
To:     Kishon Vijay Abraham I <kishon@...com>
Cc:     Antoine Tenart <antoine.tenart@...e-electrons.com>,
        davem@...emloft.net, andrew@...n.ch, jason@...edaemon.net,
        sebastian.hesselbarth@...il.com,
        gregory.clement@...e-electrons.com,
        thomas.petazzoni@...e-electrons.com, nadavh@...vell.com,
        linux@...linux.org.uk, linux-kernel@...r.kernel.org,
        mw@...ihalf.com, stefanc@...vell.com,
        miquel.raynal@...e-electrons.com, netdev@...r.kernel.org
Subject: Re: [PATCH net-next v3 02/13] phy: add the mvebu cp110 comphy driver

Hi Kishon,

On Wed, Aug 30, 2017 at 10:49:13AM +0530, Kishon Vijay Abraham I wrote:
> On Monday 28 August 2017 08:27 PM, Antoine Tenart wrote:
> > +
> > +static int mvebu_comphy_set_mode_sgmii(struct phy *phy, enum phy_mode mode)
> 
> the mode need not be passed as argument here since this function is only for
> sgmii mode.

Sure, I'll remove it.

> > +{
> > +	struct mvebu_comphy_lane *lane = phy_get_drvdata(phy);
> > +	struct mvebu_comphy_priv *priv = lane->priv;
> > +	u32 val;
> > +
> > +	mvebu_comphy_ethernet_init_reset(lane, mode);
> > +
> > +	val = readl(priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
> > +	val &= ~MVEBU_COMPHY_RX_CTRL1_CLK8T_EN;
> > +	val |= MVEBU_COMPHY_RX_CTRL1_RXCLK2X_SEL;
> > +	writel(val, priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
> > +
> > +	val = readl(priv->base + MVEBU_COMPHY_DLT_CTRL(lane->id));
> > +	val &= ~MVEBU_COMPHY_DLT_CTRL_DTL_FLOOP_EN;
> > +	writel(val, priv->base + MVEBU_COMPHY_DLT_CTRL(lane->id));
> > +
> > +	regmap_read(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), &val);
> > +	val &= ~MVEBU_COMPHY_CONF1_USB_PCIE;
> > +	val |= MVEBU_COMPHY_CONF1_PWRUP;
> > +	regmap_write(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), val);
> > +
> > +	val = readl(priv->base + MVEBU_COMPHY_GEN1_S0(lane->id));
> > +	val &= ~MVEBU_COMPHY_GEN1_S0_TX_EMPH(0xf);
> > +	val |= MVEBU_COMPHY_GEN1_S0_TX_EMPH(0x1);
> > +	writel(val, priv->base + MVEBU_COMPHY_GEN1_S0(lane->id));
> > +
> > +	return mvebu_comphy_init_plls(lane, mode);
> > +}
> > +
> > +static int mvebu_comphy_set_mode_10gkr(struct phy *phy, enum phy_mode mode)
> 
> same here..

And here as well.

Thanks!
Antoine

-- 
Antoine Ténart, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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