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Date:   Tue, 10 Oct 2017 18:56:54 +0000
From:   <Woojung.Huh@...rochip.com>
To:     <dmurphy@...com>, <andrew@...n.ch>, <f.fainelli@...il.com>
CC:     <netdev@...r.kernel.org>, <afd@...com>
Subject: RE: [PATCH v5 1/2] net: phy: DP83822 initial driver submission

> +static int dp83822_config_intr(struct phy_device *phydev)
> +{
> +	int misr_status;
> +	int physcr_status;
> +	int err;
> +
> +	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
> +		misr_status = phy_read(phydev, MII_DP83822_MISR1);
> +		if (misr_status < 0)
> +			return misr_status;
> +
> +		misr_status |= (DP83822_RX_ERR_HF_INT_EN |
> +				DP83822_FALSE_CARRIER_HF_INT_EN |
> +				DP83822_ANEG_COMPLETE_INT_EN |
> +				DP83822_DUP_MODE_CHANGE_INT_EN |
> +				DP83822_SPEED_CHANGED_INT_EN |
> +				DP83822_LINK_STAT_INT_EN |
> +				DP83822_ENERGY_DET_INT_EN |
> +				DP83822_LINK_QUAL_INT_EN);
> +
> +		err = phy_write(phydev, MII_DP83822_MISR1, misr_status);
> +		if (err < 0)
> +			return err;
> +
> +		misr_status = phy_read(phydev, MII_DP83822_MISR2);
> +		if (misr_status < 0)
> +			return misr_status;
> +
> +		misr_status |= (DP83822_JABBER_DET_INT_EN |
> +				DP83822_WOL_PKT_INT_EN |
> +				DP83822_SLEEP_MODE_INT_EN |
> +				DP83822_MDI_XOVER_INT_EN |
> +				DP83822_LB_FIFO_INT_EN |
> +				DP83822_PAGE_RX_INT_EN |
> +				DP83822_ANEG_ERR_INT_EN |
> +				DP83822_EEE_ERROR_CHANGE_INT_EN);
> +
> +		err = phy_write(phydev, MII_DP83822_MISR2, misr_status);
> +		if (err < 0)
> +			return err;
> +
> +		physcr_status = phy_read(phydev, MII_DP83822_PHYSCR);
> +		if (physcr_status < 0)
> +			return physcr_status;
> +
> +		physcr_status |= DP83822_PHYSCR_INT_OE |
> DP83822_PHYSCR_INTEN;
> +
Don't want to be picky, but seeing extra blank line here. 

> +	} else {
> +		err = phy_write(phydev, MII_DP83822_MISR1, 0);
> +		if (err < 0)
> +			return err;
> +
> +		err = phy_write(phydev, MII_DP83822_MISR1, 0);
> +		if (err < 0)
> +			return err;
> +
> +		physcr_status = phy_read(phydev, MII_DP83822_PHYSCR);
> +		if (physcr_status < 0)
> +			return physcr_status;
> +
> +		physcr_status &= ~DP83822_PHYSCR_INTEN;
> +	}

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