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Date:   Thu, 7 Dec 2017 09:44:55 +0100
From:   Daniel Lezcano <daniel.lezcano@...aro.org>
To:     Greentime Hu <green.hu@...il.com>, greentime@...estech.com,
        linux-kernel@...r.kernel.org, arnd@...db.de,
        linux-arch@...r.kernel.org, tglx@...utronix.de,
        jason@...edaemon.net, marc.zyngier@....com, robh+dt@...nel.org,
        netdev@...r.kernel.org, deanbo422@...il.com,
        devicetree@...r.kernel.org, viro@...iv.linux.org.uk,
        dhowells@...hat.com, will.deacon@....com,
        linux-serial@...r.kernel.org
Cc:     Rick Chen <rickchen36@...il.com>
Subject: Re: [PATCH v2 33/35] clocksource/drivers/atcpit100: Add andestech
 atcpit100 timer

On 27/11/2017 13:28, Greentime Hu wrote:
> From: Rick Chen <rickchen36@...il.com>
> 
> ATCPIT100 is often used on the Andes architecture,
> This timer provide 4 PIT channels. Each PIT channel is a
> multi-function timer, can be configured as 32,16,8 bit timers
> or PWM as well.
> 
> For system timer it will set channel 1 32-bit timer0 as clock
> source and count downwards until underflow and restart again.
> 
> It also set channel 0 32-bit timer0 as clock event and count
> downwards until condition match. It will generate an interrupt
> for handling periodically.
> 
> Signed-off-by: Rick Chen <rickchen36@...il.com>
> Signed-off-by: Greentime Hu <green.hu@...il.com>
> ---

Looks good.

Please resend this patch folded with the Makefile change and the DT
binding (fixed) as suggested by Arnd. I will merge them.

Thanks

  -- Daniel


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