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Date: Fri, 05 Jan 2018 19:32:48 +0000
From: Al Viro <viro@....linux.org.uk>
To: netdev@...r.kernel.org
Cc: <derek.chickles@...iumnetworks.com>, Chickles@....linux.org.uk,
Derek@....linux.org.uk
Subject: Subject: [RFC][PATCH 09/11] cavium: trivial sparse annotations
Signed-off-by: Al Viro <viro@...iv.linux.org.uk>
---
.../ethernet/cavium/liquidio/cn23xx_pf_device.c | 32 +++++++++++-----------
.../ethernet/cavium/liquidio/cn23xx_vf_device.c | 20 +++++++-------
.../net/ethernet/cavium/liquidio/cn68xx_device.c | 1 +
drivers/net/ethernet/cavium/liquidio/lio_main.c | 8 +++---
drivers/net/ethernet/cavium/liquidio/lio_vf_main.c | 4 +--
.../net/ethernet/cavium/liquidio/liquidio_common.h | 4 +--
.../net/ethernet/cavium/liquidio/octeon_mailbox.h | 6 ++--
.../net/ethernet/cavium/liquidio/octeon_mem_ops.c | 1 +
8 files changed, 39 insertions(+), 37 deletions(-)
diff --git a/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c b/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c
index e8b290473ee2..dab604cb299a 100644
--- a/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c
+++ b/drivers/net/ethernet/cavium/liquidio/cn23xx_pf_device.c
@@ -134,12 +134,12 @@ void cn23xx_dump_pf_initialized_regs(struct octeon_device *oct)
/*In cn23xx_enable_interrupt and cn23xx_disable_interrupt*/
dev_dbg(&oct->pci_dev->dev, "%s[%llx] : 0x%016llx\n",
"cn23xx->intr_enb_reg64",
- CVM_CAST64((long)(cn23xx->intr_enb_reg64)),
+ CVM_CAST64((unsigned long)(cn23xx->intr_enb_reg64)),
CVM_CAST64(readq(cn23xx->intr_enb_reg64)));
dev_dbg(&oct->pci_dev->dev, "%s[%llx] : 0x%016llx\n",
"cn23xx->intr_sum_reg64",
- CVM_CAST64((long)(cn23xx->intr_sum_reg64)),
+ CVM_CAST64((unsigned long)(cn23xx->intr_sum_reg64)),
CVM_CAST64(readq(cn23xx->intr_sum_reg64)));
/*In cn23xx_setup_iq_regs*/
@@ -447,7 +447,7 @@ static int cn23xx_pf_setup_global_input_regs(struct octeon_device *oct)
if (iq)
inst_cnt_reg = iq->inst_cnt_reg;
else
- inst_cnt_reg = (u8 *)oct->mmio[0].hw_addr +
+ inst_cnt_reg = oct->mmio[0].hw_addr +
CN23XX_SLI_IQ_INSTR_COUNT64(q_no);
reg_val =
@@ -537,7 +537,7 @@ static void cn23xx_pf_setup_global_output_regs(struct octeon_device *oct)
}
/** Setting the water mark level for pko back pressure **/
- writeq(0x40, (u8 *)oct->mmio[0].hw_addr + CN23XX_SLI_OQ_WMARK);
+ writeq(0x40, oct->mmio[0].hw_addr + CN23XX_SLI_OQ_WMARK);
/** Disabling setting OQs in reset when ring has no dorebells
* enabling this will cause of head of line blocking
@@ -545,17 +545,17 @@ static void cn23xx_pf_setup_global_output_regs(struct octeon_device *oct)
/* Do it only for pass1.1. and pass1.2 */
if ((oct->rev_id == OCTEON_CN23XX_REV_1_0) ||
(oct->rev_id == OCTEON_CN23XX_REV_1_1))
- writeq(readq((u8 *)oct->mmio[0].hw_addr +
+ writeq(readq(oct->mmio[0].hw_addr +
CN23XX_SLI_GBL_CONTROL) | 0x2,
- (u8 *)oct->mmio[0].hw_addr + CN23XX_SLI_GBL_CONTROL);
+ oct->mmio[0].hw_addr + CN23XX_SLI_GBL_CONTROL);
/** Enable channel-level backpressure */
if (oct->pf_num)
writeq(0xffffffffffffffffULL,
- (u8 *)oct->mmio[0].hw_addr + CN23XX_SLI_OUT_BP_EN2_W1S);
+ oct->mmio[0].hw_addr + CN23XX_SLI_OUT_BP_EN2_W1S);
else
writeq(0xffffffffffffffffULL,
- (u8 *)oct->mmio[0].hw_addr + CN23XX_SLI_OUT_BP_EN_W1S);
+ oct->mmio[0].hw_addr + CN23XX_SLI_OUT_BP_EN_W1S);
}
static int cn23xx_setup_pf_device_regs(struct octeon_device *oct)
@@ -597,9 +597,9 @@ static void cn23xx_setup_iq_regs(struct octeon_device *oct, u32 iq_no)
* for this queue
*/
iq->doorbell_reg =
- (u8 *)oct->mmio[0].hw_addr + CN23XX_SLI_IQ_DOORBELL(iq_no);
+ oct->mmio[0].hw_addr + CN23XX_SLI_IQ_DOORBELL(iq_no);
iq->inst_cnt_reg =
- (u8 *)oct->mmio[0].hw_addr + CN23XX_SLI_IQ_INSTR_COUNT64(iq_no);
+ oct->mmio[0].hw_addr + CN23XX_SLI_IQ_INSTR_COUNT64(iq_no);
dev_dbg(&oct->pci_dev->dev, "InstQ[%d]:dbell reg @ 0x%p instcnt_reg @ 0x%p\n",
iq_no, iq->doorbell_reg, iq->inst_cnt_reg);
@@ -641,9 +641,9 @@ static void cn23xx_setup_oq_regs(struct octeon_device *oct, u32 oq_no)
/* Get the mapped address of the pkt_sent and pkts_credit regs */
droq->pkts_sent_reg =
- (u8 *)oct->mmio[0].hw_addr + CN23XX_SLI_OQ_PKTS_SENT(oq_no);
+ oct->mmio[0].hw_addr + CN23XX_SLI_OQ_PKTS_SENT(oq_no);
droq->pkts_credit_reg =
- (u8 *)oct->mmio[0].hw_addr + CN23XX_SLI_OQ_PKTS_CREDIT(oq_no);
+ oct->mmio[0].hw_addr + CN23XX_SLI_OQ_PKTS_CREDIT(oq_no);
if (!oct->msix_on) {
/* Enable this output queue to generate Packet Timer Interrupt
@@ -731,15 +731,15 @@ static int cn23xx_setup_pf_mbox(struct octeon_device *oct)
mbox->state = OCTEON_MBOX_STATE_IDLE;
/* PF mbox interrupt reg */
- mbox->mbox_int_reg = (u8 *)oct->mmio[0].hw_addr +
+ mbox->mbox_int_reg = oct->mmio[0].hw_addr +
CN23XX_SLI_MAC_PF_MBOX_INT(mac_no, pf_num);
/* PF writes into SIG0 reg */
- mbox->mbox_write_reg = (u8 *)oct->mmio[0].hw_addr +
+ mbox->mbox_write_reg = oct->mmio[0].hw_addr +
CN23XX_SLI_PKT_PF_VF_MBOX_SIG(q_no, 0);
/* PF reads from SIG1 reg */
- mbox->mbox_read_reg = (u8 *)oct->mmio[0].hw_addr +
+ mbox->mbox_read_reg = oct->mmio[0].hw_addr +
CN23XX_SLI_PKT_PF_VF_MBOX_SIG(q_no, 1);
/*Mail Box Thread creation*/
@@ -1491,7 +1491,7 @@ void cn23xx_tell_vf_its_macaddr_changed(struct octeon_device *oct, int vfidx,
mbox_cmd.recv_len = 0;
mbox_cmd.recv_status = 0;
mbox_cmd.fn = NULL;
- mbox_cmd.fn_arg = 0;
+ mbox_cmd.fn_arg = NULL;
ether_addr_copy(mbox_cmd.msg.s.params, mac);
mbox_cmd.q_no = vfidx * oct->sriov_info.rings_per_vf;
octeon_mbox_write(oct, &mbox_cmd);
diff --git a/drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c b/drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c
index 9338a0008378..e3ce8ffb036c 100644
--- a/drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c
+++ b/drivers/net/ethernet/cavium/liquidio/cn23xx_vf_device.c
@@ -118,7 +118,7 @@ static int cn23xx_vf_setup_global_input_regs(struct octeon_device *oct)
if (iq)
inst_cnt_reg = iq->inst_cnt_reg;
else
- inst_cnt_reg = (u8 *)oct->mmio[0].hw_addr +
+ inst_cnt_reg = oct->mmio[0].hw_addr +
CN23XX_VF_SLI_IQ_INSTR_COUNT64(q_no);
d64 = octeon_read_csr64(oct,
@@ -220,9 +220,9 @@ static void cn23xx_setup_vf_iq_regs(struct octeon_device *oct, u32 iq_no)
* for this queue
*/
iq->doorbell_reg =
- (u8 *)oct->mmio[0].hw_addr + CN23XX_VF_SLI_IQ_DOORBELL(iq_no);
+ oct->mmio[0].hw_addr + CN23XX_VF_SLI_IQ_DOORBELL(iq_no);
iq->inst_cnt_reg =
- (u8 *)oct->mmio[0].hw_addr + CN23XX_VF_SLI_IQ_INSTR_COUNT64(iq_no);
+ oct->mmio[0].hw_addr + CN23XX_VF_SLI_IQ_INSTR_COUNT64(iq_no);
dev_dbg(&oct->pci_dev->dev, "InstQ[%d]:dbell reg @ 0x%p instcnt_reg @ 0x%p\n",
iq_no, iq->doorbell_reg, iq->inst_cnt_reg);
@@ -252,9 +252,9 @@ static void cn23xx_setup_vf_oq_regs(struct octeon_device *oct, u32 oq_no)
/* Get the mapped address of the pkt_sent and pkts_credit regs */
droq->pkts_sent_reg =
- (u8 *)oct->mmio[0].hw_addr + CN23XX_VF_SLI_OQ_PKTS_SENT(oq_no);
+ oct->mmio[0].hw_addr + CN23XX_VF_SLI_OQ_PKTS_SENT(oq_no);
droq->pkts_credit_reg =
- (u8 *)oct->mmio[0].hw_addr + CN23XX_VF_SLI_OQ_PKTS_CREDIT(oq_no);
+ oct->mmio[0].hw_addr + CN23XX_VF_SLI_OQ_PKTS_CREDIT(oq_no);
}
static void cn23xx_vf_mbox_thread(struct work_struct *work)
@@ -292,13 +292,13 @@ static int cn23xx_setup_vf_mbox(struct octeon_device *oct)
/* VF mbox interrupt reg */
mbox->mbox_int_reg =
- (u8 *)oct->mmio[0].hw_addr + CN23XX_VF_SLI_PKT_MBOX_INT(0);
+ oct->mmio[0].hw_addr + CN23XX_VF_SLI_PKT_MBOX_INT(0);
/* VF reads from SIG0 reg */
mbox->mbox_read_reg =
- (u8 *)oct->mmio[0].hw_addr + CN23XX_SLI_PKT_PF_VF_MBOX_SIG(0, 0);
+ oct->mmio[0].hw_addr + CN23XX_SLI_PKT_PF_VF_MBOX_SIG(0, 0);
/* VF writes into SIG1 reg */
mbox->mbox_write_reg =
- (u8 *)oct->mmio[0].hw_addr + CN23XX_SLI_PKT_PF_VF_MBOX_SIG(0, 1);
+ oct->mmio[0].hw_addr + CN23XX_SLI_PKT_PF_VF_MBOX_SIG(0, 1);
INIT_DELAYED_WORK(&mbox->mbox_poll_wk.work,
cn23xx_vf_mbox_thread);
@@ -379,7 +379,7 @@ void cn23xx_vf_ask_pf_to_do_flr(struct octeon_device *oct)
mbox_cmd.recv_len = 0;
mbox_cmd.recv_status = 0;
mbox_cmd.fn = NULL;
- mbox_cmd.fn_arg = 0;
+ mbox_cmd.fn_arg = NULL;
octeon_mbox_write(oct, &mbox_cmd);
}
@@ -588,7 +588,7 @@ static void cn23xx_disable_vf_interrupt(struct octeon_device *oct, u8 intr_flag)
/* Write all 1's in INT_LEVEL reg to disable PO_INT */
octeon_write_csr64(
oct, CN23XX_VF_SLI_OQ_PKT_INT_LEVELS(q_no),
- 0x3fffffffffffff);
+ 0x3fffffffffffffULL);
}
}
if (intr_flag & OCTEON_INPUT_INTR) {
diff --git a/drivers/net/ethernet/cavium/liquidio/cn68xx_device.c b/drivers/net/ethernet/cavium/liquidio/cn68xx_device.c
index 50b533ff58e6..cd5d5d6e7e5e 100644
--- a/drivers/net/ethernet/cavium/liquidio/cn68xx_device.c
+++ b/drivers/net/ethernet/cavium/liquidio/cn68xx_device.c
@@ -26,6 +26,7 @@
#include "cn66xx_regs.h"
#include "cn66xx_device.h"
#include "cn68xx_regs.h"
+#include "cn68xx_device.h"
static void lio_cn68xx_set_dpi_regs(struct octeon_device *oct)
{
diff --git a/drivers/net/ethernet/cavium/liquidio/lio_main.c b/drivers/net/ethernet/cavium/liquidio/lio_main.c
index a5eecd895a82..6d0454bc1f8e 100644
--- a/drivers/net/ethernet/cavium/liquidio/lio_main.c
+++ b/drivers/net/ethernet/cavium/liquidio/lio_main.c
@@ -3158,7 +3158,7 @@ static void liquidio_add_vxlan_port(struct net_device *netdev,
liquidio_vxlan_port_command(netdev,
OCTNET_CMD_VXLAN_PORT_CONFIG,
- htons(ti->port),
+ ntohs(ti->port),
OCTNET_CMD_VXLAN_PORT_ADD);
}
@@ -3170,7 +3170,7 @@ static void liquidio_del_vxlan_port(struct net_device *netdev,
liquidio_vxlan_port_command(netdev,
OCTNET_CMD_VXLAN_PORT_CONFIG,
- htons(ti->port),
+ ntohs(ti->port),
OCTNET_CMD_VXLAN_PORT_DEL);
}
@@ -3264,7 +3264,7 @@ static int liquidio_set_vf_vlan(struct net_device *netdev, int vfidx,
vfidx + 1; /* vfidx is 0 based, but vf_num (param2) is 1 based */
nctrl.ncmd.s.more = 0;
nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
- nctrl.cb_fn = 0;
+ nctrl.cb_fn = NULL;
nctrl.wait_time = LIO_CMD_WAIT_TM;
octnet_send_nic_ctrl_pkt(oct, &nctrl);
@@ -3313,7 +3313,7 @@ static int liquidio_set_vf_link_state(struct net_device *netdev, int vfidx,
nctrl.ncmd.s.param2 = linkstate;
nctrl.ncmd.s.more = 0;
nctrl.iq_no = lio->linfo.txpciq[0].s.q_no;
- nctrl.cb_fn = 0;
+ nctrl.cb_fn = NULL;
nctrl.wait_time = LIO_CMD_WAIT_TM;
octnet_send_nic_ctrl_pkt(oct, &nctrl);
diff --git a/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c b/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c
index fd70a4844e2d..edf747a1b306 100644
--- a/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c
+++ b/drivers/net/ethernet/cavium/liquidio/lio_vf_main.c
@@ -2212,7 +2212,7 @@ static void liquidio_add_vxlan_port(struct net_device *netdev,
liquidio_vxlan_port_command(netdev,
OCTNET_CMD_VXLAN_PORT_CONFIG,
- htons(ti->port),
+ ntohs(ti->port),
OCTNET_CMD_VXLAN_PORT_ADD);
}
@@ -2224,7 +2224,7 @@ static void liquidio_del_vxlan_port(struct net_device *netdev,
liquidio_vxlan_port_command(netdev,
OCTNET_CMD_VXLAN_PORT_CONFIG,
- htons(ti->port),
+ ntohs(ti->port),
OCTNET_CMD_VXLAN_PORT_DEL);
}
diff --git a/drivers/net/ethernet/cavium/liquidio/liquidio_common.h b/drivers/net/ethernet/cavium/liquidio/liquidio_common.h
index 522dcc4dcff7..7a5247c2bcfe 100644
--- a/drivers/net/ethernet/cavium/liquidio/liquidio_common.h
+++ b/drivers/net/ethernet/cavium/liquidio/liquidio_common.h
@@ -949,8 +949,8 @@ struct lio_vf_rep_req {
} rep_name;
struct lio_vf_rep_mtu {
- u32 mtu;
- u32 rsvd;
+ __be32 mtu;
+ __be32 rsvd;
} rep_mtu;
struct lio_vf_rep_state {
diff --git a/drivers/net/ethernet/cavium/liquidio/octeon_mailbox.h b/drivers/net/ethernet/cavium/liquidio/octeon_mailbox.h
index 1def22afeff1..f905605f3dd7 100644
--- a/drivers/net/ethernet/cavium/liquidio/octeon_mailbox.h
+++ b/drivers/net/ethernet/cavium/liquidio/octeon_mailbox.h
@@ -91,15 +91,15 @@ struct octeon_mbox {
struct cavium_wk mbox_poll_wk;
/** SLI_MAC_PF_MBOX_INT for PF, SLI_PKT_MBOX_INT for VF. */
- void *mbox_int_reg;
+ void __iomem *mbox_int_reg;
/** SLI_PKT_PF_VF_MBOX_SIG(0) for PF, SLI_PKT_PF_VF_MBOX_SIG(1) for VF.
*/
- void *mbox_write_reg;
+ void __iomem *mbox_write_reg;
/** SLI_PKT_PF_VF_MBOX_SIG(1) for PF, SLI_PKT_PF_VF_MBOX_SIG(0) for VF.
*/
- void *mbox_read_reg;
+ void __iomem *mbox_read_reg;
struct octeon_mbox_cmd mbox_req;
diff --git a/drivers/net/ethernet/cavium/liquidio/octeon_mem_ops.c b/drivers/net/ethernet/cavium/liquidio/octeon_mem_ops.c
index 4c85ae643b7b..7ccab36143c1 100644
--- a/drivers/net/ethernet/cavium/liquidio/octeon_mem_ops.c
+++ b/drivers/net/ethernet/cavium/liquidio/octeon_mem_ops.c
@@ -22,6 +22,7 @@
#include "octeon_iq.h"
#include "response_manager.h"
#include "octeon_device.h"
+#include "octeon_mem_ops.h"
#define MEMOPS_IDX BAR1_INDEX_DYNAMIC_MAP
--
2.11.0
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