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Date: Fri, 05 Jan 2018 17:10:14 -0800 From: Dan Williams <dan.j.williams@...el.com> To: linux-kernel@...r.kernel.org Cc: Mark Rutland <mark.rutland@....com>, linux-arch@...r.kernel.org, peterz@...radead.org, netdev@...r.kernel.org, gregkh@...uxfoundation.org, tglx@...utronix.de, torvalds@...ux-foundation.org, alan@...ux.intel.com Subject: [PATCH 04/18] arm: implement nospec_ptr() From: Mark Rutland <mark.rutland@....com> This patch implements nospec_ptr() for arm, following the recommended architectural sequences for the arm and thumb instruction sets. Signed-off-by: Mark Rutland <mark.rutland@....com> Signed-off-by: Dan Williams <dan.j.williams@...el.com> --- arch/arm/include/asm/barrier.h | 75 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/arch/arm/include/asm/barrier.h b/arch/arm/include/asm/barrier.h index 40f5c410fd8c..6384c90e4b72 100644 --- a/arch/arm/include/asm/barrier.h +++ b/arch/arm/include/asm/barrier.h @@ -37,6 +37,81 @@ #define dmb(x) __asm__ __volatile__ ("" : : : "memory") #endif +#ifdef CONFIG_THUMB2_KERNEL +#define __load_no_speculate_n(ptr, lo, hi, failval, cmpptr, sz) \ +({ \ + typeof(*ptr) __nln_val; \ + typeof(*ptr) __failval = \ + (typeof(*ptr)(unsigned long)(failval)); \ + \ + asm volatile ( \ + " cmp %[c], %[l]\n" \ + " it hs\n" \ + " cmphs %[h], %[c]\n" \ + " blo 1f\n" \ + " ld" #sz " %[v], %[p]\n" \ + "1: it lo\n" \ + " movlo %[v], %[f]\n" \ + " .inst 0xf3af8014 @ CSDB\n" \ + : [v] "=&r" (__nln_val) \ + : [p] "m" (*(ptr)), [l] "r" (lo), [h] "r" (hi), \ + [f] "r" (__failval), [c] "r" (cmpptr) \ + : "cc"); \ + \ + __nln_val; \ +}) +#else +#define __load_no_speculate_n(ptr, lo, hi, failval, cmpptr, sz) \ +({ \ + typeof(*ptr) __nln_val; \ + typeof(*ptr) __failval = \ + (typeof(*ptr)(unsigned long)(failval)); \ + \ + asm volatile ( \ + " cmp %[c], %[l]\n" \ + " cmphs %[h], %[c]\n" \ + " ldr" #sz "hi %[v], %[p]\n" \ + " movls %[v], %[f]\n" \ + " .inst 0xe320f014 @ CSDB\n" \ + : [v] "=&r" (__nln_val) \ + : [p] "m" (*(ptr)), [l] "r" (lo), [h] "r" (hi), \ + [f] "r" (__failval), [c] "r" (cmpptr) \ + : "cc"); \ + \ + __nln_val; \ +}) +#endif + +#define __load_no_speculate(ptr, lo, hi, failval, cmpptr) \ +({ \ + typeof(*(ptr)) __nl_val; \ + \ + switch (sizeof(__nl_val)) { \ + case 1: \ + __nl_val = __load_no_speculate_n(ptr, lo, hi, failval, \ + cmpptr, b); \ + break; \ + case 2: \ + __nl_val = __load_no_speculate_n(ptr, lo, hi, failval, \ + cmpptr, h); \ + break; \ + case 4: \ + __nl_val = __load_no_speculate_n(ptr, lo, hi, failval, \ + cmpptr, ); \ + break; \ + default: \ + BUILD_BUG(); \ + } \ + \ + __nl_val; \ +}) + +#define nospec_ptr(ptr, lo, hi) \ +({ \ + typeof(ptr) __np_ptr = (ptr); \ + __load_no_speculate(&__np_ptr, lo, hi, 0, __np_ptr); \ +}) + #ifdef CONFIG_ARM_HEAVY_MB extern void (*soc_mb)(void); extern void arm_heavy_mb(void);
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