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Date: Tue, 13 Feb 2018 17:09:38 +0800 From: Greentime Hu <green.hu@...il.com> To: greentime@...estech.com, linux-kernel@...r.kernel.org, arnd@...db.de, linux-arch@...r.kernel.org, tglx@...utronix.de, jason@...edaemon.net, marc.zyngier@....com, robh+dt@...nel.org, netdev@...r.kernel.org, deanbo422@...il.com, devicetree@...r.kernel.org, viro@...iv.linux.org.uk, dhowells@...hat.com, will.deacon@....com, daniel.lezcano@...aro.org, linux-serial@...r.kernel.org, geert.uytterhoeven@...il.com, linus.walleij@...aro.org, mark.rutland@....com, greg@...ah.com, ren_guo@...ky.com, rdunlap@...radead.org, davem@...emloft.net, jonas@...thpole.se, stefan.kristiansson@...nalahti.fi, shorne@...il.com Cc: green.hu@...il.com Subject: [PATCH v7 34/37] dt-bindings: nds32 SoC Bindings This patch adds nds32 SoC(AE3XX and AG101P) binding documents. Signed-off-by: Greentime Hu <greentime@...estech.com> Reviewed-by: Rob Herring <robh@...nel.org> Acked-by: Arnd Bergmann <arnd@...db.de> --- .../devicetree/bindings/nds32/andestech-boards | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/nds32/andestech-boards diff --git a/Documentation/devicetree/bindings/nds32/andestech-boards b/Documentation/devicetree/bindings/nds32/andestech-boards new file mode 100644 index 000000000000..f5d75693e3c7 --- /dev/null +++ b/Documentation/devicetree/bindings/nds32/andestech-boards @@ -0,0 +1,40 @@ +Andestech(nds32) AE3XX Platform +----------------------------------------------------------------------------- +The AE3XX prototype demonstrates the AE3XX example platform on the FPGA. It +is composed of one Andestech(nds32) processor and AE3XX. + +Required properties (in root node): +- compatible = "andestech,ae3xx"; + +Example: +/dts-v1/; +/ { + compatible = "andestech,ae3xx"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; +}; + +Andestech(nds32) AG101P Platform +----------------------------------------------------------------------------- +AG101P is a generic SoC Platform IP that works with any of Andestech(nds32) +processors to provide a cost-effective and high performance solution for +majority of embedded systems in variety of application domains. Users may +simply attach their IP on one of the system buses together with certain glue +logics to complete a SoC solution for a specific application. With +comprehensive simulation and design environments, users may evaluate the +system performance of their applications and track bugs of their designs +efficiently. The optional hardware development platform further provides real +system environment for early prototyping and software/hardware co-development. + +Required properties (in root node): + compatible = "andestech,ag101p"; + +Example: +/dts-v1/; +/ { + compatible = "andestech,ag101p"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; +}; -- 2.16.1
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