netdev - Re: [PATCH 4/4] net: dsa: mv88e6xxx: guess number of g1 irqs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Mon, 19 Mar 2018 13:01:31 +0100
From:   Andrew Lunn <andrew@...n.ch>
To:     Uwe Kleine-König 
        <u.kleine-koenig@...gutronix.de>
Cc:     Vivien Didelot <vivien.didelot@...oirfairelinux.com>,
        kernel@...gutronix.de, Florian Fainelli <f.fainelli@...il.com>,
        netdev@...r.kernel.org,
        Gregory CLEMENT <gregory.clement@...e-electrons.com>
Subject: Re: [PATCH 4/4] net: dsa: mv88e6xxx: guess number of g1 irqs

On Mon, Mar 19, 2018 at 11:05:23AM +0100, Uwe Kleine-König wrote:
> I don't have access to the documentation of the marvell switches, but
> with this change the switch driver successfully binds on the
> espressobin after its device tree makes use of the switch's irq line.

DaveM just accepted a patch like this from me.

      Andrew

> ---
>  drivers/net/dsa/mv88e6xxx/chip.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
> index 38fe875b9631..b3696540e002 100644
> --- a/drivers/net/dsa/mv88e6xxx/chip.c
> +++ b/drivers/net/dsa/mv88e6xxx/chip.c
> @@ -3420,6 +3420,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
>  		.global2_addr = 0x1c,
>  		.age_time_coeff = 3750,
>  		.atu_move_port_mask = 0x1f,
> +		.g1_irqs = 9,
>  		.g2_irqs = 10,
>  		.pvt = true,
>  		.multi_chip = true,
> @@ -3728,6 +3729,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
>  		.global2_addr = 0x1c,
>  		.age_time_coeff = 3750,
>  		.atu_move_port_mask = 0x1f,
> +		.g1_irqs = 9,
>  		.g2_irqs = 10,
>  		.pvt = true,
>  		.multi_chip = true,
> -- 
> 2.16.2
>