netdev - Re: [PATCH net] net: phy: broadcom: Fix auxiliary control register reads

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Date:   Wed, 23 May 2018 15:19:00 -0400 (EDT)
From:   David Miller <davem@...emloft.net>
To:     f.fainelli@...il.com
Cc:     netdev@...r.kernel.org, jon.mason@...adcom.com, andrew@...n.ch,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH net] net: phy: broadcom: Fix auxiliary control register
 reads

From: Florian Fainelli <f.fainelli@...il.com>
Date: Tue, 22 May 2018 16:22:26 -0700

> We are currently doing auxiliary control register reads with the shadow
> register value 0b111 (0x7) which incidentally is also the selector value
> that should be present in bits [2:0]. Fix this by using the appropriate
> selector mask which is defined (MII_BCM54XX_AUXCTL_SHDWSEL_MASK).
> 
> This does not have a functional impact yet because we always access the
> MII_BCM54XX_AUXCTL_SHDWSEL_MISC (0x7) register in the current code.
> This might change at some point though.
> 
> Fixes: 5b4e29005123 ("net: phy: broadcom: add bcm54xx_auxctl_read")
> Signed-off-by: Florian Fainelli <f.fainelli@...il.com>
> ---
> David, please queue this for -stable as well, thank you!

Applied and queued up for -stable.