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Date:   Tue, 05 Jun 2018 09:43:55 -0400 (EDT)
From:   David Miller <davem@...emloft.net>
To:     kunyi@...gle.com
Cc:     netdev@...r.kernel.org, Avi.Fishman@...oton.com,
        tali.perry@...oton.com, tomer.maimon@...oton.com,
        benjaminfair@...gle.com, rlippert@...gle.com, f.fainelli@...il.com
Subject: Re: [PATCH net-next] net: phy: broadcom: Enable 125 MHz clock on
 LED4 pin for BCM54612E by default.

From: Kun Yi <kunyi@...gle.com>
Date: Mon,  4 Jun 2018 13:17:04 -0700

> BCM54612E have 4 multi-functional LED pins that can be configured
> through register setting; the LED4 pin can be configured to a 125MHz
> reference clock output by setting the spare register. Since the dedicated
> CLK125 reference clock pin is not brought out on the 48-Pin MLP, the LED4
> pin is the only pin to provide such function in this package, and therefore
> it is beneficial to just enable the reference clock by default.
> 
> Signed-off-by: Kun Yi <kunyi@...gle.com>

Applied, thank you.

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