lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Tue, 5 Mar 2019 01:24:44 +0000
From:   <Tristram.Ha@...rochip.com>
To:     <f.fainelli@...il.com>
CC:     <UNGLinuxDriver@...rochip.com>, <netdev@...r.kernel.org>,
        <andrew@...n.ch>, <pavel@....cz>
Subject: RE: [PATCH v1 net-next 3/3] net: dsa: microchip: add KSZ9893 switch
 support

> >  static int ksz9477_phy_read16(struct dsa_switch *ds, int addr, int reg)
> > @@ -389,6 +399,10 @@ static int ksz9477_phy_write16(struct dsa_switch
> *ds, int addr, int reg,
> >  	/* No real PHY after this. */
> >  	if (addr >= dev->phy_port_cnt)
> >  		return 0;
> > +
> > +	/* No gigabit support.  Do not write to this register. */
> > +	if (!(dev->features & GBIT_SUPPORT) && reg == MII_CTRL1000)
> > +		return 0;
> 
> There should not be any reasons to write to this register if the
> linkmode capabilities are correctly reflected which you do take care of,
> did you find PHYLIB writing to that register?

I found the register is being written, although not trying to advertise gigabit speed.

Problem is the switch wants to have a 100Mbit variant but does not properly prepare the PHY for that.  From the outside the PHY looks like it is gigabit capable.  Internally gigabit support is completely removed.

Just to be safe the driver does not want to touch that register.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ