netdev - Re: [PATCH v2 net-next 2/7] octeontx2-pf: Handle VF function level reset

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Date:   Sat, 14 Mar 2020 21:12:53 +0530
From:   Sunil Kovvuri <sunil.kovvuri@...il.com>
To:     Leon Romanovsky <leon@...nel.org>
Cc:     Linux Netdev List <netdev@...r.kernel.org>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        Geetha sowjanya <gakula@...vell.com>,
        Sunil Goutham <sgoutham@...vell.com>
Subject: Re: [PATCH v2 net-next 2/7] octeontx2-pf: Handle VF function level reset

On Fri, Mar 13, 2020 at 11:46 PM Leon Romanovsky <leon@...nel.org> wrote:
>
> On Fri, Mar 13, 2020 at 03:12:41PM +0530, sunil.kovvuri@...il.com wrote:
> > From: Geetha sowjanya <gakula@...vell.com>
> >
> > When FLR is initiated for a VF (PCI function level reset),
> > the parent PF gets a interrupt. PF then sends a message to
> > admin function (AF), which then cleanups all resources attached
> > to that VF.
> >
> > Also handled IRQs triggered when master enable bit is cleared
> > or set for VFs. This handler just clears the transaction pending
> > ie TRPEND bit.
> >
> > Signed-off-by: Geetha sowjanya <gakula@...vell.com>
> > Signed-off-by: Sunil Goutham <sgoutham@...vell.com>
> > ---
> >  .../ethernet/marvell/octeontx2/nic/otx2_common.h   |   7 +
> >  .../net/ethernet/marvell/octeontx2/nic/otx2_pf.c   | 234 ++++++++++++++++++++-
> >  2 files changed, 240 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
> > index 74439e1..c0a9693 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
> > +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
> > @@ -191,6 +191,11 @@ struct otx2_hw {
> >       u64                     cgx_tx_stats[CGX_TX_STATS_COUNT];
> >  };
> >
> > +struct flr_work {
> > +     struct work_struct work;
> > +     struct otx2_nic *pf;
> > +};
> > +
> >  struct refill_work {
> >       struct delayed_work pool_refill_work;
> >       struct otx2_nic *pf;
> > @@ -226,6 +231,8 @@ struct otx2_nic {
> >
> >       u64                     reset_count;
> >       struct work_struct      reset_task;
> > +     struct workqueue_struct *flr_wq;
> > +     struct flr_work         *flr_wrk;
> >       struct refill_work      *refill_wrk;
> >
> >       /* Ethtool stuff */
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
> > index 967ef7b..bf6e2529 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
> > +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
> > @@ -61,6 +61,224 @@ static int otx2_change_mtu(struct net_device *netdev, int new_mtu)
> >       return err;
> >  }
> >
> > +static void otx2_disable_flr_me_intr(struct otx2_nic *pf)
> > +{
> > +     int irq, vfs = pf->total_vfs;
> > +
> > +     /* Disable VFs ME interrupts */
> > +     otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs));
> > +     irq = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFME0);
> > +     free_irq(irq, pf);
> > +
> > +     /* Disable VFs FLR interrupts */
> > +     otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs));
> > +     irq = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFFLR0);
> > +     free_irq(irq, pf);
> > +
> > +     if (vfs <= 64)
> > +             return;
> > +
> > +     otx2_write64(pf, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));
> > +     irq = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFME1);
> > +     free_irq(irq, pf);
> > +
> > +     otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));
> > +     irq = pci_irq_vector(pf->pdev, RVU_PF_INT_VEC_VFFLR1);
> > +     free_irq(irq, pf);
> > +}
> > +
> > +static void otx2_flr_wq_destroy(struct otx2_nic *pf)
> > +{
> > +     if (!pf->flr_wq)
> > +             return;
> > +     flush_workqueue(pf->flr_wq);
> > +     destroy_workqueue(pf->flr_wq);
>
> destroy_workqueue() calls to drain_workqueue() which calls to
> flush_workqueue() in proper order and not like it is written here.
>

Thanks, will fix this in v3.

Sunil.