netdev - Re: [net-next V9 14/14] net/mlx5: Add devlink subfunction port documentation

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Date:   Sat, 23 Jan 2021 12:09:15 -0800
From:   "Samudrala, Sridhar" <sridhar.samudrala@...el.com>
To:     Jason Gunthorpe <jgg@...dia.com>
Cc:     Saeed Mahameed <saeed@...nel.org>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>, netdev@...r.kernel.org,
        linux-rdma@...r.kernel.org, alexander.duyck@...il.com,
        edwin.peer@...adcom.com, dsahern@...nel.org, kiran.patil@...el.com,
        jacob.e.keller@...el.com, david.m.ertman@...el.com,
        dan.j.williams@...el.com, Parav Pandit <parav@...dia.com>,
        Saeed Mahameed <saeedm@...dia.com>
Subject: Re: [net-next V9 14/14] net/mlx5: Add devlink subfunction port
 documentation

On 1/21/2021 4:11 PM, Jason Gunthorpe wrote:
> On Thu, Jan 21, 2021 at 12:59:55PM -0800, Samudrala, Sridhar wrote:
>
>>> +                 mlx5_core.sf.4
>>> +          (subfunction auxiliary device)
>>> +                       /\
>>> +                      /  \
>>> +                     /    \
>>> +                    /      \
>>> +                   /        \
>>> +      mlx5_core.eth.4     mlx5_core.rdma.4
>>> +     (sf eth aux dev)     (sf rdma aux dev)
>>> +         |                      |
>>> +         |                      |
>>> +      p0sf88                  mlx5_0
>>> +     (sf netdev)          (sf rdma device)
>> This picture seems to indicate that when SF is activated, a sub
>> function auxiliary device is created
> Yes
>
>> and when a driver is bound to that sub function aux device and
>> probed, 2 additional auxiliary devices are created.
> More than two, but yes
>
>> Is this correct? Are all these auxiliary devices seen on the same
>> aux bus?
> Yes
>
>> Why do we need another sf eth aux device?
> The first aux device represents the physical HW and mlx5_core binds to it,
> the analog is like a pci_device.

OK. So looks like you are creating a function level aux device and a 
subsytem-level aux
device for each subsystem including ethernet.

>
> The other aux devices represent the subsystem split of the mlx5 driver
> - mlx5_core creates them and each subsystem in turn binds to the
> mlx5_core driver. This already exists, and Intel will be doing this as
> well whenever the RDMA driver is posted again..

Yes. I see that the intel RDMA patches are now submitted. We are 
creating an aux device to
expose RDMA functionality, but  not planning to create an aux device for 
ethernet subsystem
on a PF/SF as the function-level pci/aux device can represent the 
default ethernet.